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Message-ID: <6222003c478f11ce6fb6564e722800a0@codeaurora.org>
Date: Thu, 06 Feb 2020 16:09:09 +0800
From: Can Guo <cang@...eaurora.org>
To: Avri Altman <Avri.Altman@....com>
Cc: asutoshd@...eaurora.org, nguyenb@...eaurora.org,
hongwus@...eaurora.org, rnayak@...eaurora.org,
linux-scsi@...r.kernel.org, kernel-team@...roid.com,
saravanak@...gle.com, salyzyn@...gle.com,
Alim Akhtar <alim.akhtar@...sung.com>,
"James E.J. Bottomley" <jejb@...ux.ibm.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Bean Huo <beanhuo@...ron.com>,
Stanley Chu <stanley.chu@...iatek.com>,
Colin Ian King <colin.king@...onical.com>,
Tomas Winkler <tomas.winkler@...el.com>,
Bart Van Assche <bvanassche@....org>,
Venkat Gopalakrishnan <venkatg@...eaurora.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 6/8] scsi: ufs: Add dev ref clock gating wait time support
On 2020-02-06 15:57, Avri Altman wrote:
>> In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime
>> defines
>> the minimum time for which the reference clock is required by device
>> during
>> transition to LS-MODE or HIBERN8 state. Make this change to reflect
>> the new
>> requirement by adding delays before turning off the clock.
>>
>> Signed-off-by: Can Guo <cang@...eaurora.org>
>> Reviewed-by: Asutosh Das <asutoshd@...eaurora.org>
>> Reviewed-by: Bean Huo <beanhuo@...ron.com>
>>
>> diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
>> index cfe3803..990cb48 100644
>> --- a/drivers/scsi/ufs/ufs.h
>> +++ b/drivers/scsi/ufs/ufs.h
>> @@ -167,6 +167,7 @@ enum attr_idn {
>> QUERY_ATTR_IDN_FFU_STATUS = 0x14,
>> QUERY_ATTR_IDN_PSA_STATE = 0x15,
>> QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
>> + QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
>> };
>>
>> /* Descriptor idn for Query requests */
>> @@ -534,6 +535,8 @@ struct ufs_dev_info {
>> u16 wmanufacturerid;
>> /*UFS device Product Name */
>> u8 *model;
>> + u16 wspecversion;
>> + u32 clk_gating_wait_us;
>> };
>>
>> /**
>> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
>> index e8f7f9d..76beaf9 100644
>> --- a/drivers/scsi/ufs/ufshcd.c
>> +++ b/drivers/scsi/ufs/ufshcd.c
>> @@ -91,6 +91,9 @@
>> /* default delay of autosuspend: 2000 ms */
>> #define RPM_AUTOSUSPEND_DELAY_MS 2000
>>
>> +/* Default value of wait time before gating device ref clock */
>> +#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
>> +
>> #define ufshcd_toggle_vreg(_dev, _vreg, _on)
>> \
>> ({
>> \
>> int _ret;
>> \
>> @@ -3281,6 +3284,29 @@ static inline int
>> ufshcd_read_unit_desc_param(struct ufs_hba *hba,
>> param_offset, param_read_buf,
>> param_size);
>> }
>>
>> +static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
>> +{
>> + int err = 0;
>> + u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
>> +
>> + if (hba->dev_info.wspecversion >= 0x300) {
>> + err = ufshcd_query_attr_retry(hba,
>> UPIU_QUERY_OPCODE_READ_ATTR,
>> +
>> QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
>> + &gating_wait);
>> + if (err)
>> + dev_err(hba->dev, "Failed reading
>> bRefClkGatingWait. err =
>> %d, use default %uus\n",
>> + err, gating_wait);
>> +
>> + if (gating_wait == 0) {
>> + gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
>> + dev_err(hba->dev, "Undefined ref clk gating
>> wait time, use
>> default %uus\n",
>> + gating_wait);
>> + }
>
> You forgot to set
> hba->dev_info.clk_gating_wait_us = gating_wait
>
> Thanks,
> Avri
oops, shall add it back. Thanks.
Can Guo
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