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Message-ID: <20200206103858.GB17074@willie-the-truck>
Date:   Thu, 6 Feb 2020 10:38:59 +0000
From:   Will Deacon <will@...nel.org>
To:     Bhupesh Sharma <bhsharma@...hat.com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        bhupesh.linux@...il.com, Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>
Subject: Re: [PATCH 2/2] perf/arm64: Allow per-task kernel breakpoints

On Tue, Feb 04, 2020 at 03:56:24AM +0530, Bhupesh Sharma wrote:
> commit 478fcb2cdb23 ("arm64: Debugging support") disallowed per-task
> kernel breakpoints on arm64 since these would have potentially
> complicated the stepping code.
> 
> However, we now have several use-cases (for e.g. perf) which require
> per-task address execution h/w breakpoint to be exercised/set on arm64:

To be honest, the perf interface to hw_breakpoint is an abomination and
I think we should remove it entirely for arm64. It's flakey, complicated,
adds code to context-switch and reduces the capabilities available to
ptrace.

> For e.g. we can set address execution h/w breakpoints, using the
> format prescribed by 'perf-list' command:
> mem:<addr>[/len][:access]                          [Hardware breakpoint]
> 
> Without this patch, currently 'perf stat -e' reports that per-task
> address execution h/w breakpoints are 'not supported' on arm64. See
> below:
> 
> $ TEST_FUNC="vfs_read"
> $ ADDR=0x`cat /proc/kallsyms | grep -P "\\s$TEST_FUNC\$" | cut -f1 -d' '`
> $ perf stat -e mem:$ADDR:x -x';' -- cat /proc/cpuinfo > /dev/null
> 
> <not supported>;;mem:0xffff00001031dd68:x;0;100.00;;
> 
> After this patch, this use-case can be supported:
> 
> $ TEST_FUNC="vfs_read"
> $ ADDR=0x`cat /proc/kallsyms | grep -P "\\s$TEST_FUNC\$" | cut -f1 -d' '`
> $ perf stat -e mem:$ADDR:x -x';' -- cat /proc/cpuinfo > /dev/null
> 
> 5;;mem:0xfffffe0010361d20:x;912200;100.00;;
> 
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Ard Biesheuvel <ard.biesheuvel@...aro.org>
> Signed-off-by: Bhupesh Sharma <bhsharma@...hat.com>
> ---
>  arch/arm64/kernel/hw_breakpoint.c | 7 -------
>  1 file changed, 7 deletions(-)
> 
> diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c
> index 0b727edf4104..c28f04e02845 100644
> --- a/arch/arm64/kernel/hw_breakpoint.c
> +++ b/arch/arm64/kernel/hw_breakpoint.c
> @@ -562,13 +562,6 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
>  	hw->address &= ~alignment_mask;
>  	hw->ctrl.len <<= offset;
>  
> -	/*
> -	 * Disallow per-task kernel breakpoints since these would
> -	 * complicate the stepping code.
> -	 */
> -	if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target)
> -		return -EINVAL;
> -

Sorry, but this is broken; the check is there for a reason, not just for
fun!

Look at how the step handler toggles the bp registers.

Will

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