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Message-ID: <DB8PR04MB6747A07EA7111D8694B0D57C841D0@DB8PR04MB6747.eurprd04.prod.outlook.com>
Date:   Thu, 6 Feb 2020 13:25:25 +0000
From:   "Z.q. Hou" <zhiqiang.hou@....com>
To:     Andrew Murray <andrew.murray@....com>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "l.subrahmanya@...iveil.co.in" <l.subrahmanya@...iveil.co.in>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "m.karthikeyan@...iveil.co.in" <m.karthikeyan@...iveil.co.in>,
        Leo Li <leoyang.li@....com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Xiaowei Bao <xiaowei.bao@....com>
Subject: RE: [PATCHv9 06/12] PCI: mobiveil: Add callback function for link up
 check

Hi Andrew,

Thanks a lot for your review!

B.R,
Zhiqiang

> -----Original Message-----
> From: Andrew Murray <andrew.murray@....com>
> Sent: 2020年1月13日 19:22
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> bhelgaas@...gle.com; robh+dt@...nel.org; arnd@...db.de;
> mark.rutland@....com; l.subrahmanya@...iveil.co.in;
> shawnguo@...nel.org; m.karthikeyan@...iveil.co.in; Leo Li
> <leoyang.li@....com>; lorenzo.pieralisi@....com;
> catalin.marinas@....com; will.deacon@....com; Mingkai Hu
> <mingkai.hu@....com>; M.h. Lian <minghuan.lian@....com>; Xiaowei Bao
> <xiaowei.bao@....com>
> Subject: Re: [PATCHv9 06/12] PCI: mobiveil: Add callback function for link up
> check
> 
> On Wed, Nov 20, 2019 at 03:45:57AM +0000, Z.q. Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> >
> > The platforms, in which the Mobiveil GPEX is integrated, may have
> > their specific mechanism to check link up status.
> > This patch is to enable these platforms to implement theirs.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > ---
> > V9:
> >  - New patch splited from the #1 of V8 patches to make it easy to review.
> >
> >  drivers/pci/controller/mobiveil/pcie-mobiveil.c | 3 +++
> > drivers/pci/controller/mobiveil/pcie-mobiveil.h | 5 +++++
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> > b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> > index 2773f823c9ea..b9ed2d95641c 100644
> > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
> > @@ -125,6 +125,9 @@ void mobiveil_csr_write(struct mobiveil_pcie
> > *pcie, u32 val, u32 off,
> >
> >  bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie)  {
> > +	if (pcie->ops->link_up)
> > +		return pcie->ops->link_up(pcie);
> > +
> >  	return (mobiveil_csr_readl(pcie, LTSSM_STATUS) &
> >  		LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0;
> 
> On the previous patch I suggested that we don't mix up the link_up logic with
> the logic that decides which function to call. In this case the link_up logic is
> trivial. So this is probably OK.
> 
> Reviewed-by: Andrew Murray <andrew.murray@....com>
> 
> >  }
> > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > index 18d85806a7fc..95d2e7c809b8 100644
> > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > @@ -148,6 +148,10 @@ struct root_port {
> >  	struct pci_host_bridge *bridge;
> >  };
> >
> > +struct mobiveil_pab_ops {
> > +	int (*link_up)(struct mobiveil_pcie *pcie); };
> > +
> >  struct mobiveil_pcie {
> >  	struct platform_device *pdev;
> >  	void __iomem *csr_axi_slave_base;	/* root port config base */
> > @@ -157,6 +161,7 @@ struct mobiveil_pcie {
> >  	int ppio_wins;
> >  	int ob_wins_configured;		/* configured outbound windows */
> >  	int ib_wins_configured;		/* configured inbound windows */
> > +	const struct mobiveil_pab_ops *ops;
> >  	struct root_port rp;
> >  };
> >
> > --
> > 2.17.1
> >

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