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Message-ID: <20200206175652.GA25108@bogus>
Date:   Thu, 6 Feb 2020 17:56:52 +0000
From:   Rob Herring <robh@...nel.org>
To:     Rahul Tanwar <rahul.tanwar@...ux.intel.com>
Cc:     mturquette@...libre.com, sboyd@...nel.org, mark.rutland@....com,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, andriy.shevchenko@...el.com,
        qi-ming.wu@...el.com, yixin.zhu@...ux.intel.com,
        cheol.yong.kim@...el.com
Subject: Re: [PATCH v3 2/2] dt-bindings: clk: intel: Add bindings document &
 header file for a new clock driver

On Thu, Jan 30, 2020 at 04:54:01PM +0800, Rahul Tanwar wrote:
> Clock generation unit(CGU) is a clock controller IP of Intel's Lightning
> Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock
> controller driver of LGM.
> 
> Signed-off-by: Rahul Tanwar <rahul.tanwar@...ux.intel.com>
> ---
>  .../devicetree/bindings/clock/intel,cgu-lgm.yaml   |  40 +++++
>  include/dt-bindings/clock/intel,lgm-clk.h          | 165 +++++++++++++++++++++
>  2 files changed, 205 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml
>  create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml
> new file mode 100644
> index 000000000000..e9649fe75435
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/clock/intel,cgu-lgm.yaml#

Drop 'bindings'

With that,

Reviewed-by: Rob Herring <robh@...nel.org>

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