linux-kernel - [RFC v3 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings

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Date:   Fri,  7 Feb 2020 20:14:55 +0530
From:   Pradeep P V K <ppvk@...eaurora.org>
To:     adrian.hunter@...el.com, robh+dt@...nel.org,
        ulf.hansson@...aro.org, asutoshd@...eaurora.org,
        stummala@...eaurora.org, sayalil@...eaurora.org,
        rampraka@...eaurora.org, vbadigan@...eaurora.org, sboyd@...nel.org,
        georgi.djakov@...aro.org
Cc:     linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        agross@...nel.org, linux-mmc-owner@...r.kernel.org,
        mka@...omium.org, Pradeep P V K <ppvk@...eaurora.org>
Subject: [RFC v3 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings

Add interconnect bandwidth scaling supported strings for qcom-sdhci
controller.

changes from RFC v2 -> v3:
- Addressed review comments on v2.
- Modified interconnect bandwidth support using OPP framework.

Signed-off-by: Pradeep P V K <ppvk@...eaurora.org>
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 7ee639b..cbe97b8 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -40,6 +40,21 @@ Required properties:
 	"cal"	- reference clock for RCLK delay calibration (optional)
 	"sleep"	- sleep clock for RCLK delay calibration (optional)
 
+Optional Properties:
+* Following bus parameters are required for interconnect bandwidth scaling:
+- interconnects: Pairs of phandles and interconnect provider specifier
+		 to denote the edge source and destination ports of
+		 the interconnect path.
+
+- interconnect-names: For sdhc, we have two main paths.
+		1. Data path : sdhc to ddr
+		2. Config path : cpu to sdhc
+		For Data interconnect path the name supposed to be
+		is "sdhc-ddr" and for config interconnect path it is
+		"cpu-sdhc".
+		Please refer to Documentation/devicetree/bindings/
+		interconnect/ for more details.
+
 Example:
 
 	sdhc_1: sdhci@...24900 {
@@ -57,6 +72,9 @@ Example:
 
 		clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
 		clock-names = "core", "iface";
+		interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
+				<&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
+		interconnect-names = "sdhc-ddr","cpu-sdhc";
 	};
 
 	sdhc_2: sdhci@...a4900 {
-- 
1.9.1