lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sat, 8 Feb 2020 19:19:22 +0300
From:   Dmitry Osipenko <digetx@...il.com>
To:     Sameer Pujar <spujar@...dia.com>
Cc:     perex@...ex.cz, tiwai@...e.com, robh+dt@...nel.org,
        broonie@...nel.org, lgirdwood@...il.com, thierry.reding@...il.com,
        jonathanh@...dia.com, alsa-devel@...a-project.org,
        devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, sharadg@...dia.com,
        mkumard@...dia.com, viswanathl@...dia.com, rlokhande@...dia.com,
        dramesh@...dia.com, atalambedu@...dia.com
Subject: Re: [PATCH v2 3/9] ASoC: tegra: add Tegra210 based DMIC driver

07.02.2020 14:06, Sameer Pujar пишет:
> 
> 
> On 2/6/2020 10:23 PM, Dmitry Osipenko wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> 30.01.2020 13:33, Sameer Pujar пишет:
>> ...
>>> +static const struct reg_default tegra210_dmic_reg_defaults[] = {
>>> +     { TEGRA210_DMIC_TX_INT_MASK, 0x00000001},
>>> +     { TEGRA210_DMIC_TX_CIF_CTRL, 0x00007700},
>>> +     { TEGRA210_DMIC_CG, 0x1},
>>> +     { TEGRA210_DMIC_CTRL, 0x00000301},
>>> +     /* Below enables all filters - DCR, LP and SC */
>>> +     { TEGRA210_DMIC_DBG_CTRL, 0xe },
>>> +     /* Below as per latest POR value */
>>> +     { TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4, 0x0},
>>> +     /* LP filter is configured for pass through and used to apply
>>> gain */
>>> +     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_0, 0x00800000},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_1, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_2, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_3, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_4, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_0, 0x00800000},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_1, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_2, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_3, 0x0},
>>> +     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_4, 0x0},
>>> +};
>> I'd add a space on the right side of `}`, for consistency with the left.
> 
> Do you mean like this?
> { TEGRA210_DMIC_TX_INT_MASK, 0x00000001 },
> { TEGRA210_DMIC_TX_CIF_CTRL, 0x00007700 },
>     . . .

Yes

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ