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Message-ID: <1581322307-11140-3-git-send-email-nkristam@nvidia.com>
Date: Mon, 10 Feb 2020 13:41:28 +0530
From: Nagarjuna Kristam <nkristam@...dia.com>
To: <balbi@...nel.org>, <gregkh@...uxfoundation.org>,
<thierry.reding@...il.com>, <jonathanh@...dia.com>,
<mark.rutland@....com>, <robh+dt@...nel.org>, <kishon@...com>
CC: <devicetree@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Nagarjuna Kristam <nkristam@...dia.com>
Subject: [Patch V5 02/21] dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
Add device-tree binding documentation for the XUSB device mode controller
present on Tegra210 and Tegra186 SoC. This controller supports the USB 3.0
specification.
Signed-off-by: Nagarjuna Kristam <nkristam@...dia.com>
Reviewed-by: Rob Herring <robh@...nel.org>
Acked-by: Thierry Reding <treding@...dia.com>
---
V4-V5:
- No changes.
---
V3:
- Added Reviewed-by and Acked-by updates to commit message.
---
V2:
- used enum instead of oneOf and const.
- Moved reg, reg-names, clocks, clock-names to property section from allOf.
- Limited allOf to min and max items based on soc.
- Updated description for power-domains.
- Added V1 reference
---
V1
- This document is yaml version of [1], with difference of usb-role-switch
removal.
[1] https://patchwork.kernel.org/patch/11156253/
---
.../devicetree/bindings/usb/nvidia,tegra-xudc.yaml | 190 +++++++++++++++++++++
1 file changed, 190 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
new file mode 100644
index 0000000..b84ed8e
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml
@@ -0,0 +1,190 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)
+
+description:
+ The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
+ USB 3.0 SuperSpeed protocols.
+
+maintainers:
+ - Nagarjuna Kristam <nkristam@...dia.com>
+ - JC Kuo <jckuo@...dia.com>
+ - Thierry Reding <treding@...dia.com>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - nvidia,tegra210-xudc # For Tegra210
+ - nvidia,tegra186-xudc # For Tegra186
+
+ reg:
+ minItems: 2
+ maxItems: 3
+ items:
+ - description: XUSB device controller registers
+ - description: XUSB device PCI Config registers
+ - description: XUSB device registers.
+
+ reg-names:
+ minItems: 2
+ maxItems: 3
+ items:
+ - const: base
+ - const: fpci
+ - const: ipfs
+
+ interrupts:
+ maxItems: 1
+ description: Must contain the XUSB device interrupt.
+
+ clocks:
+ minItems: 4
+ maxItems: 5
+ items:
+ - description: Clock to enable core XUSB dev clock.
+ - description: Clock to enable XUSB super speed clock.
+ - description: Clock to enable XUSB super speed dev clock.
+ - description: Clock to enable XUSB high speed dev clock.
+ - description: Clock to enable XUSB full speed dev clock.
+
+ clock-names:
+ minItems: 4
+ maxItems: 5
+ items:
+ - const: dev
+ - const: ss
+ - const: ss_src
+ - const: fs_src
+ - const: hs_src
+
+ power-domains:
+ maxItems: 2
+ items:
+ - description: XUSBB(device) power-domain
+ - description: XUSBA(superspeed) power-domain
+
+ power-domain-names:
+ maxItems: 2
+ items:
+ - const: dev
+ - const: ss
+
+ nvidia,xusb-padctl:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ phandle to the XUSB pad controller that is used to configure the USB pads
+ used by the XUDC controller.
+
+ phys:
+ minItems: 1
+ description:
+ Must contain an entry for each entry in phy-names.
+ See ../phy/phy-bindings.txt for details.
+
+ phy-names:
+ minItems: 1
+ items:
+ - const: usb2-0
+ - const: usb2-1
+ - const: usb2-2
+ - const: usb2-3
+ - const: usb3-0
+ - const: usb3-1
+ - const: usb3-2
+ - const: usb3-3
+
+ avddio-usb-supply:
+ description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
+
+ hvdd-usb-supply:
+ description: USB controller power supply. Must supply 3.3 V.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+ - power-domains
+ - power-domain-names
+ - nvidia,xusb-padctl
+ - phys
+ - phy-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra210-xudc
+ then:
+ properties:
+ reg:
+ minItems: 3
+ reg-names:
+ minItems: 3
+ clocks:
+ minItems: 5
+ clock-names:
+ minItems: 5
+ required:
+ - avddio-usb-supply
+ - hvdd-usb-supply
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra186-xudc
+ then:
+ properties:
+ reg:
+ maxItems: 2
+ reg-names:
+ maxItems: 2
+ clocks:
+ maxItems: 4
+ clock-names:
+ maxItems: 4
+
+examples:
+ - |
+ #include <dt-bindings/clock/tegra210-car.h>
+ #include <dt-bindings/gpio/tegra-gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb@...d0000 {
+ compatible = "nvidia,tegra210-xudc";
+ reg = <0x0 0x700d0000 0x0 0x8000>,
+ <0x0 0x700d8000 0x0 0x1000>,
+ <0x0 0x700d9000 0x0 0x1000>;
+ reg-names = "base", "fpci", "ipfs";
+
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
+ <&tegra_car TEGRA210_CLK_XUSB_SS>,
+ <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
+ <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
+ <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
+ clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
+
+ power-domains = <&pd_xusbdev>, <&pd_xusbss>;
+ power-domain-names = "dev", "ss";
+
+ nvidia,xusb-padctl = <&padctl>;
+
+ phys = <µ_b>;
+ phy-names = "usb2-0";
+
+ avddio-usb-supply = <&vdd_pex_1v05>;
+ hvdd-usb-supply = <&vdd_3v3_sys>;
+ };
--
2.7.4
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