[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200210233711.GA1787983@kroah.com>
Date: Mon, 10 Feb 2020 15:37:11 -0800
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: Zhangfei Gao <zhangfei.gao@...aro.org>
Cc: Arnd Bergmann <arnd@...db.de>,
Herbert Xu <herbert@...dor.apana.org.au>,
jonathan.cameron@...wei.com, dave.jiang@...el.com,
grant.likely@....com, jean-philippe <jean-philippe@...aro.org>,
Jerome Glisse <jglisse@...hat.com>,
ilias.apalodimas@...aro.org, francois.ozog@...aro.org,
kenneth-lee-2012@...mail.com, Wangzhou <wangzhou1@...ilicon.com>,
"haojian . zhuang" <haojian.zhuang@...aro.org>,
guodong.xu@...aro.org, linux-accelerators@...ts.ozlabs.org,
linux-kernel@...r.kernel.org, linux-crypto@...r.kernel.org,
iommu@...ts.linux-foundation.org,
Kenneth Lee <liguozhu@...ilicon.com>,
Zaibo Xu <xuzaibo@...wei.com>
Subject: Re: [PATCH v12 2/4] uacce: add uacce driver
On Wed, Jan 15, 2020 at 10:12:46PM +0800, Zhangfei Gao wrote:
> From: Kenneth Lee <liguozhu@...ilicon.com>
>
> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
> provide Shared Virtual Addressing (SVA) between accelerators and processes.
> So accelerator can access any data structure of the main cpu.
> This differs from the data sharing between cpu and io device, which share
> only data content rather than address.
> Since unified address, hardware and user space of process can share the
> same virtual address in the communication.
>
> Uacce create a chrdev for every registration, the queue is allocated to
> the process when the chrdev is opened. Then the process can access the
> hardware resource by interact with the queue file. By mmap the queue
> file space to user space, the process can directly put requests to the
> hardware without syscall to the kernel space.
>
> The IOMMU core only tracks mm<->device bonds at the moment, because it
> only needs to handle IOTLB invalidation and PASID table entries. However
> uacce needs a finer granularity since multiple queues from the same
> device can be bound to an mm. When the mm exits, all bound queues must
> be stopped so that the IOMMU can safely clear the PASID table entry and
> reallocate the PASID.
>
> An intermediate struct uacce_mm links uacce devices and queues.
> Note that an mm may be bound to multiple devices but an uacce_mm
> structure only ever belongs to a single device, because we don't need
> anything more complex (if multiple devices are bound to one mm, then
> we'll create one uacce_mm for each bond).
>
> uacce_device --+-- uacce_mm --+-- uacce_queue
> | '-- uacce_queue
> |
> '-- uacce_mm --+-- uacce_queue
> +-- uacce_queue
> '-- uacce_queue
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
> Signed-off-by: Kenneth Lee <liguozhu@...ilicon.com>
> Signed-off-by: Zaibo Xu <xuzaibo@...wei.com>
> Signed-off-by: Zhou Wang <wangzhou1@...ilicon.com>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@...aro.org>
> Signed-off-by: Zhangfei Gao <zhangfei.gao@...aro.org>
Looks much saner now, thanks for all of the work on this:
Reviewed-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Or am I supposed to take this in my tree? If so, I can, but I need an
ack for the crypto parts.
thanks,
greg k-h
Powered by blists - more mailing lists