lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 11 Feb 2020 10:57:59 -0800 From: Greg KH <gregkh@...uxfoundation.org> To: Andi Kleen <ak@...ux.intel.com> Cc: roman.sudarikov@...ux.intel.com, peterz@...radead.org, mingo@...hat.com, acme@...nel.org, mark.rutland@....com, alexander.shishkin@...ux.intel.com, jolsa@...hat.com, namhyung@...nel.org, linux-kernel@...r.kernel.org, eranian@...gle.com, bgregg@...flix.com, kan.liang@...ux.intel.com, alexander.antonov@...el.com Subject: Re: [PATCH v5 3/3] perf x86: Exposing an Uncore unit to PMON for Intel Xeon® server platform On Tue, Feb 11, 2020 at 10:42:00AM -0800, Andi Kleen wrote: > On Tue, Feb 11, 2020 at 09:15:44AM -0800, Greg KH wrote: > > On Tue, Feb 11, 2020 at 07:15:49PM +0300, roman.sudarikov@...ux.intel.com wrote: > > > +static ssize_t skx_iio_mapping_show(struct device *dev, > > > + struct device_attribute *attr, char *buf) > > > +{ > > > + struct pmu *pmu = dev_get_drvdata(dev); > > > + struct intel_uncore_pmu *uncore_pmu = > > > + container_of(pmu, struct intel_uncore_pmu, pmu); > > > + > > > + struct dev_ext_attribute *ea = > > > + container_of(attr, struct dev_ext_attribute, attr); > > > + long die = (long)ea->var; > > > + > > > + return sprintf(buf, "0000:%02x\n", skx_iio_stack(uncore_pmu, die)); > > > > If "0000:" is always the "prefix" of the output of this file, why have > > it at all as you always know it is there? > > > > What is ever going to cause that to change? > > I think it's just to make it a complete PCI address. Is that what this really is? If so, it's not a "complete" pci address, is it? If it is, use the real pci address please. > In theory it might be different on a complex multi node system with > custom interconnect and multiple PCI segments, but that would need code > changes too. > > This version of the patchkit only supports standard SKX systems > at this point. I have no idea what that means, please translate for non-Intel people :) greg k-h
Powered by blists - more mailing lists