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Date:   Tue, 11 Feb 2020 11:02:55 +0100
From:   Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
To:     Stefan Wahren <stefan.wahren@...e.com>,
        Mathias Nyman <mathias.nyman@...ux.intel.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Mathias Nyman <mathias.nyman@...el.com>
Cc:     linux-usb@...r.kernel.org, linux-rpi-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] usb: xhci: Enable LPM for VIA LABS VL805

Hi Stefan, Mathias.

On Tue, 2020-02-11 at 10:49 +0100, Stefan Wahren wrote:
> Hi Mathias,
> 
> On 11.02.20 10:34, Mathias Nyman wrote:
> > On 10.2.2020 20.59, Greg Kroah-Hartman wrote:
> > > On Mon, Jan 20, 2020 at 03:24:22PM +0100, Nicolas Saenz Julienne wrote:
> > > > This PCIe controller chip is used on the Raspberry Pi 4 and multiple
> > > > adapter cards. There is no publicly available documentation for the
> > > > chip, yet both the downstream RPi4 kernel and the controller cards
> > > > support/advertise LPM support.
> > > > 
> > > > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
> > > > ---
> > > >  drivers/usb/host/xhci-pci.c | 3 +++
> > > >  1 file changed, 3 insertions(+)
> > > > 
> > > > diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
> > > > index 4917c5b033fa..c1976e98992b 100644
> > > > --- a/drivers/usb/host/xhci-pci.c
> > > > +++ b/drivers/usb/host/xhci-pci.c
> > > > @@ -241,6 +241,9 @@ static void xhci_pci_quirks(struct device *dev,
> > > > struct xhci_hcd *xhci)
> > > >  			pdev->device == 0x3432)
> > > >  		xhci->quirks |= XHCI_BROKEN_STREAMS;
> > > >  
> > > > +	if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483)
> > > > +		xhci->quirks |= XHCI_LPM_SUPPORT;
> > > > +
> > > >  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
> > > >  			pdev->device == 0x1042)
> > > >  		xhci->quirks |= XHCI_BROKEN_STREAMS;
> > > Mathias, is this in your review queue?
> > > 
> > Ah yes, before adding link power management support for this controller we
> > should check that it has sane (or any) exit latency values set in its
> > HCSPARAMS3 capability register.

I did some checks myself before sending the patch, and tested with some devices
I own. The latencies seemd reasonable. For example I just hooked up an USB3 HD,
the root HUB exposes:

	bU1DevExitLat           4 micro seconds
	bU2DevExitLat         231 micro seconds

And xhci configured the device with:

	bU1DevExitLat          10 micro seconds
	bU2DevExitLat        2047 micro seconds

> > Nicolas, if you have this controller could you show the capability
> > registers:
> > 
> > cat /sys/kernel/debug/usb/xhci/*/reg-cap

CAPLENGTH = 0x01000020
HCSPARAMS1 = 0x05000420
HCSPARAMS2 = 0xfc000031
HCSPARAMS3 = 0x00e70004
HCCPARAMS1 = 0x002841eb
DOORBELLOFF = 0x00000100
RUNTIMEOFF = 0x00000200
HCCPARAMS2 = 0x00000000

> sorry for the naive question, but do you need the dump with or without
> this patch applied?

IIRC these are dumps from xhci's extended registers. Shouldn't matter at all. 

Regards,
Nicolas


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