linux-kernel - [PATCHv1 1/2] ARM: dts: exynos: Add FSYS2 power domain to Exynos542x

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 12 Feb 2020 12:02:36 +0000
From:   Anand Moon <linux.amoon@...il.com>
To:     Sylwester Nawrocki <s.nawrocki@...sung.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org
Cc:     Rob Herring <robh+dt@...nel.org>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Marek Szyprowski <m.szyprowski@...sung.com>
Subject: [PATCHv1 1/2] ARM: dts: exynos: Add FSYS2 power domain to Exynos542x

Add a power domain FSYS2 for MMC device present in Exynos542x/5800 SoCs.

Signed-off-by: Anand Moon <linux.amoon@...il.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b672080e7469..2ba8a57303cd 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -210,6 +210,7 @@ mmc_0: mmc@...00000 {
 			clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
 			clock-names = "biu", "ciu";
 			fifo-depth = <0x40>;
+			power-domains = <&fsys2_pd>;
 			status = "disabled";
 		};
 
@@ -222,6 +223,7 @@ mmc_1: mmc@...10000 {
 			clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
 			clock-names = "biu", "ciu";
 			fifo-depth = <0x40>;
+			power-domains = <&fsys2_pd>;
 			status = "disabled";
 		};
 
@@ -234,6 +236,7 @@ mmc_2: mmc@...20000 {
 			clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
 			clock-names = "biu", "ciu";
 			fifo-depth = <0x40>;
+			power-domains = <&fsys2_pd>;
 			status = "disabled";
 		};
 
@@ -396,6 +399,13 @@ msc_pd: power-domain@...44120 {
 			label = "MSC";
 		};
 
+		fsys2_pd: power-domain@...44160 {
+			compatible = "samsung,exynos4210-pd";
+			reg = <0x10044160 0x20>;
+			#power-domain-cells = <0>;
+			label = "FSYS2";
+		};
+
 		pinctrl_0: pinctrl@...00000 {
 			compatible = "samsung,exynos5420-pinctrl";
 			reg = <0x13400000 0x1000>;
-- 
2.25.0