linux-kernel - [PATCH 0/7] microblaze: Define SMP safe operations

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Message-Id: <cover.1581522136.git.michal.simek@xilinx.com>
Date:   Wed, 12 Feb 2020 16:42:22 +0100
From:   Michal Simek <michal.simek@...inx.com>
To:     linux-kernel@...r.kernel.org, monstr@...str.eu,
        michal.simek@...inx.com, git@...inx.com, arnd@...db.de
Cc:     Allison Randal <allison@...utok.net>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Boqun Feng <boqun.feng@...il.com>,
        Enrico Weigelt <info@...ux.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Ingo Molnar <mingo@...hat.com>,
        Kate Stewart <kstewart@...uxfoundation.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Mike Rapoport <rppt@...ux.ibm.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>,
        Stefan Asserhall <stefan.asserhall@...inx.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Will Deacon <will@...nel.org>
Subject: [PATCH 0/7] microblaze: Define SMP safe operations

Hi,

This is follow up series on the top of cleanup series available here.
https://lkml.org/lkml/2020/2/12/215
There are two things together.
1. Changes in cpuinfo structure in patches 1 and 2
2. Defining SMP safe operations instead of IRQ disabling

Microblaze has 32bit exclusive load/store instructions which should be used
instead of irq enable/disable. For more information take a look at
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug984-vivado-microblaze-ref.pdf
starting from page 25.

Thanks,
Michal


Michal Simek (1):
  microblaze: timer: Don't use cpu timer setting

Stefan Asserhall (5):
  microblaze: Make cpuinfo structure SMP aware
  microblaze: Define SMP safe bit operations
  microblaze: Add SMP implementation of xchg and cmpxchg
  microblaze: Remove disabling IRQ while pte_update() run
  microblaze: Implement architecture spinlock

Stefan Asserhall load and store (1):
  microblaze: Do atomic operations by using exclusive ops

 arch/microblaze/include/asm/Kbuild           |   1 -
 arch/microblaze/include/asm/atomic.h         | 265 ++++++++++++++++++-
 arch/microblaze/include/asm/bitops.h         | 189 +++++++++++++
 arch/microblaze/include/asm/cmpxchg.h        |  87 ++++++
 arch/microblaze/include/asm/cpuinfo.h        |   2 +-
 arch/microblaze/include/asm/pgtable.h        |  19 +-
 arch/microblaze/include/asm/spinlock.h       | 240 +++++++++++++++++
 arch/microblaze/include/asm/spinlock_types.h |  25 ++
 arch/microblaze/kernel/cpu/cache.c           | 154 ++++++-----
 arch/microblaze/kernel/cpu/cpuinfo.c         |  38 ++-
 arch/microblaze/kernel/cpu/mb.c              | 207 ++++++++-------
 arch/microblaze/kernel/timer.c               |   2 +-
 arch/microblaze/mm/consistent.c              |   8 +-
 13 files changed, 1040 insertions(+), 197 deletions(-)
 create mode 100644 arch/microblaze/include/asm/bitops.h
 create mode 100644 arch/microblaze/include/asm/spinlock.h
 create mode 100644 arch/microblaze/include/asm/spinlock_types.h

-- 
2.25.0