linux-kernel - [PATCHv10 08/13] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors

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Message-Id: <20200213040644.45858-9-Zhiqiang.Hou@nxp.com>
Date:   Thu, 13 Feb 2020 12:06:39 +0800
From:   Zhiqiang Hou <Zhiqiang.Hou@....com>
To:     linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        bhelgaas@...gle.com, robh+dt@...nel.org, andrew.murray@....com,
        arnd@...db.de, mark.rutland@....com, l.subrahmanya@...iveil.co.in,
        shawnguo@...nel.org, m.karthikeyan@...iveil.co.in,
        leoyang.li@....com, lorenzo.pieralisi@....com,
        catalin.marinas@....com, will.deacon@....com
Cc:     Mingkai.Hu@....com, Minghuan.Lian@....com, Xiaowei.Bao@....com,
        Hou Zhiqiang <Zhiqiang.Hou@....com>
Subject: [PATCHv10 08/13] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors

From: Hou Zhiqiang <Zhiqiang.Hou@....com>

There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@....com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@...iveil.co.in>
---
V10:
 - Changed the return types to reflect the size of the access.

 .../pci/controller/mobiveil/pcie-mobiveil.h   | 23 +++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
index 623c5f0c4441..72c62b4d8f7b 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
@@ -182,10 +182,33 @@ static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off)
 	return mobiveil_csr_read(pcie, off, 0x4);
 }
 
+static inline u16 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off)
+{
+	return mobiveil_csr_read(pcie, off, 0x2);
+}
+
+static inline u8 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off)
+{
+	return mobiveil_csr_read(pcie, off, 0x1);
+}
+
+
 static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val,
 				       u32 off)
 {
 	mobiveil_csr_write(pcie, val, off, 0x4);
 }
 
+static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u16 val,
+				       u32 off)
+{
+	mobiveil_csr_write(pcie, val, off, 0x2);
+}
+
+static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u8 val,
+				       u32 off)
+{
+	mobiveil_csr_write(pcie, val, off, 0x1);
+}
+
 #endif /* _PCIE_MOBIVEIL_H */
-- 
2.17.1