linux-kernel - Re: [PATCH 0/7] microblaze: Define SMP safe operations

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Message-ID: <7de2f55d-a5ee-0aae-3b53-ed39d2b7b38a@xilinx.com>
Date:   Thu, 13 Feb 2020 09:12:54 +0100
From:   Michal Simek <michal.simek@...inx.com>
To:     Peter Zijlstra <peterz@...radead.org>,
        Michal Simek <michal.simek@...inx.com>
Cc:     linux-kernel@...r.kernel.org, monstr@...str.eu, git@...inx.com,
        arnd@...db.de, Allison Randal <allison@...utok.net>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Boqun Feng <boqun.feng@...il.com>,
        Enrico Weigelt <info@...ux.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Ingo Molnar <mingo@...hat.com>,
        Kate Stewart <kstewart@...uxfoundation.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Mike Rapoport <rppt@...ux.ibm.com>,
        Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>,
        Stefan Asserhall <stefan.asserhall@...inx.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Will Deacon <will@...nel.org>
Subject: Re: [PATCH 0/7] microblaze: Define SMP safe operations

On 13. 02. 20 9:11, Peter Zijlstra wrote:
> On Thu, Feb 13, 2020 at 08:49:40AM +0100, Michal Simek wrote:
>> On 12. 02. 20 17:08, Peter Zijlstra wrote:
>>> On Wed, Feb 12, 2020 at 04:42:22PM +0100, Michal Simek wrote:
>>>
>>>> Microblaze has 32bit exclusive load/store instructions which should be used
>>>> instead of irq enable/disable. For more information take a look at
>>>> https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug984-vivado-microblaze-ref.pdf
>>>> starting from page 25.
>>>
>>>>  arch/microblaze/include/asm/Kbuild           |   1 -
>>>>  arch/microblaze/include/asm/atomic.h         | 265 ++++++++++++++++++-
>>>>  arch/microblaze/include/asm/bitops.h         | 189 +++++++++++++
>>>>  arch/microblaze/include/asm/cmpxchg.h        |  87 ++++++
>>>>  arch/microblaze/include/asm/cpuinfo.h        |   2 +-
>>>>  arch/microblaze/include/asm/pgtable.h        |  19 +-
>>>>  arch/microblaze/include/asm/spinlock.h       | 240 +++++++++++++++++
>>>>  arch/microblaze/include/asm/spinlock_types.h |  25 ++
>>>>  arch/microblaze/kernel/cpu/cache.c           | 154 ++++++-----
>>>>  arch/microblaze/kernel/cpu/cpuinfo.c         |  38 ++-
>>>>  arch/microblaze/kernel/cpu/mb.c              | 207 ++++++++-------
>>>>  arch/microblaze/kernel/timer.c               |   2 +-
>>>>  arch/microblaze/mm/consistent.c              |   8 +-
>>>>  13 files changed, 1040 insertions(+), 197 deletions(-)
>>>>  create mode 100644 arch/microblaze/include/asm/bitops.h
>>>>  create mode 100644 arch/microblaze/include/asm/spinlock.h
>>>>  create mode 100644 arch/microblaze/include/asm/spinlock_types.h
>>>
>>> I'm missing asm/barrier.h
>>
>> This has been sent in previous patchset. Link was in this email.
> 
> lkml.org link, please don't use them. The kernel.org links (example
> below) have the Message-Id in them, which allows me to search for them
> in my local storage without having to use a web browser.
> 
> You mean this one, right?
> 
>   https://lkml.kernel.org/r/be707feb95d65b44435a0d9de946192f1fef30c6.1581497860.git.michal.simek@xilinx.com
> 
> So the PDF says this is a completion barrier, needed for DMA. This is a
> very expensive option for smp_mb(), but if it is all you have and is
> required, then yes, that should do.

Yes that's the one.

Thanks,
Michal