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Message-Id: <20200213151922.185020505@linuxfoundation.org>
Date: Thu, 13 Feb 2020 07:20:57 -0800
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org,
Denis Odintsov <d.odintsov@...viangames.com>,
Baruch Siach <baruch@...s.co.il>, Andrew Lunn <andrew@...n.ch>,
Gregory CLEMENT <gregory.clement@...tlin.com>
Subject: [PATCH 5.5 061/120] arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
From: Baruch Siach <baruch@...s.co.il>
commit 62bba54d99407aedfe9b0a02e72e23c06e2b0116 upstream.
Explicitly set the switch cpu (upstream) port phy-mode and managed
properties. This fixes the Marvell 88E6141 switch serdes configuration
with the recently enabled phylink layer.
Fixes: a6120833272c ("arm64: dts: add support for SolidRun Clearfog GT 8K")
Reported-by: Denis Odintsov <d.odintsov@...viangames.com>
Signed-off-by: Baruch Siach <baruch@...s.co.il>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -408,6 +408,8 @@
reg = <5>;
label = "cpu";
ethernet = <&cp1_eth2>;
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
};
};
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