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Date:   Fri, 14 Feb 2020 11:11:31 -0500
From:   Sasha Levin <>
Cc:     Daniel Vetter <>,
        Alex Deucher <>,
        Michel Dänzer <>,
        Daniel Vetter <>,
        Sasha Levin <>,,
Subject: [PATCH AUTOSEL 4.19 236/252] radeon: insert 10ms sleep in dce5_crtc_load_lut

From: Daniel Vetter <>

[ Upstream commit ec3d65082d7dabad6fa8f66a8ef166f2d522d6b2 ]

Per at least one tester this is enough magic to recover the regression
introduced for some people (but not all) in

commit b8e2b0199cc377617dc238f5106352c06dcd3fa2
Author: Peter Rosin <>
Date:   Tue Jul 4 12:36:57 2017 +0200

    drm/fb-helper: factor out pseudo-palette

which for radeon had the side-effect of refactoring out a seemingly
redudant writing of the color palette.

10ms in a fairly slow modeset path feels like an acceptable form of
duct-tape, so maybe worth a shot and see what sticks.

Cc: Alex Deucher <>
Cc: Michel Dänzer <>
Signed-off-by: Daniel Vetter <>
Signed-off-by: Alex Deucher <>
Signed-off-by: Sasha Levin <>
 drivers/gpu/drm/radeon/radeon_display.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 109915e914218..3a895307290a4 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -121,6 +121,8 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
 	DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
+	msleep(10);
 	WREG32(NI_INPUT_CSC_CONTROL + radeon_crtc->crtc_offset,

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