lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200214173644.GA7913@agluck-desk2.amr.corp.intel.com>
Date:   Fri, 14 Feb 2020 09:36:44 -0800
From:   "Luck, Tony" <tony.luck@...el.com>
To:     Prarit Bhargava <prarit@...hat.com>
Cc:     linux-kernel@...r.kernel.org,
        Alexander Krupp <centos@....yagii.de>,
        Borislav Petkov <bp@...en8.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
        linux-edac@...r.kernel.org
Subject: Re: [PATCH] x86/mce: Do not log spurious corrected mce errors

On Fri, Feb 14, 2020 at 07:34:07AM -0500, Prarit Bhargava wrote:
>  #ifdef CONFIG_X86_MCE_AMD
>  extern bool amd_filter_mce(struct mce *m);
> +extern bool intel_filter_mce(struct mce *m);
>  #else

Something very weird is going on here. Why does
CONFIG_X86_MCE_AMD have to be set to enable some
*Intel* filter operation?

-Tony

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ