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Message-ID: <20200214141757.8976-1-rrichter@marvell.com>
Date: Fri, 14 Feb 2020 15:17:56 +0100
From: Robert Richter <rrichter@...vell.com>
To: Borislav Petkov <bp@...en8.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Tony Luck <tony.luck@...el.com>
CC: James Morse <james.morse@....com>,
Aristeu Rozanski <aris@...hat.com>,
Robert Richter <rrichter@...vell.com>,
<linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH v2] EDAC/mc: Create new function edac_inc_csrow()
Have a separate function to count errors in csrow/channel. This better
separates code and reduces the indentation level.
Implementation note: Function edac_inc_csrow() counts the same as
before, ->ce_count is only incremented if row >= 0. This is esp. true
for the case of (!e->enable_per_layer_report). Here, a DIMM was not
found, variable row still has a value of -1 and ->ce_count is not
incremented.
Signed-off-by: Robert Richter <rrichter@...vell.com>
Reviewed-by: Mauro Carvalho Chehab <mchehab@...nel.org>
Acked-by: Aristeu Rozanski <aris@...hat.com>
---
v2:
* updated patch description to address the case fir
(!e->enable_per_layer_report),
* reordered variable declarations
---
drivers/edac/edac_mc.c | 40 +++++++++++++++++++++++++---------------
1 file changed, 25 insertions(+), 15 deletions(-)
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index e817a710739f..31ba988359d2 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -1089,6 +1089,26 @@ static void edac_ue_error(struct mem_ctl_info *mci,
edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count);
}
+static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan)
+{
+ struct mem_ctl_info *mci = error_desc_to_mci(e);
+ enum hw_event_mc_err_type type = e->type;
+ u16 count = e->error_count;
+
+ if (row < 0)
+ return;
+
+ edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
+
+ if (type == HW_EVENT_ERR_CORRECTED) {
+ mci->csrows[row]->ce_count += count;
+ if (chan >= 0)
+ mci->csrows[row]->channels[chan]->ce_count += count;
+ } else {
+ mci->csrows[row]->ue_count += count;
+ }
+}
+
void edac_raw_mc_handle_error(struct edac_raw_error_desc *e)
{
struct mem_ctl_info *mci = error_desc_to_mci(e);
@@ -1256,22 +1276,12 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
chan = -2;
}
- if (!e->enable_per_layer_report) {
+ if (!e->enable_per_layer_report)
strcpy(e->label, "any memory");
- } else {
- edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
- if (p == e->label)
- strcpy(e->label, "unknown memory");
- if (type == HW_EVENT_ERR_CORRECTED) {
- if (row >= 0) {
- mci->csrows[row]->ce_count += error_count;
- if (chan >= 0)
- mci->csrows[row]->channels[chan]->ce_count += error_count;
- }
- } else
- if (row >= 0)
- mci->csrows[row]->ue_count += error_count;
- }
+ else if (!*e->label)
+ strcpy(e->label, "unknown memory");
+
+ edac_inc_csrow(e, row, chan);
/* Fill the RAM location data */
p = e->location;
--
2.20.1
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