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Message-ID: <dbbd3b64-e030-a2f4-992c-ff90706b0ab5@linaro.org>
Date:   Fri, 14 Feb 2020 17:23:45 +0200
From:   Stanimir Varbanov <stanimir.varbanov@...aro.org>
To:     Dikshita Agarwal <dikshita@...eaurora.org>,
        linux-media@...r.kernel.org, stanimir.varbanov@...aro.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, vgarodia@...eaurora.org
Subject: Re: [PATCH V4 2/4] dt-bindings: media: venus: Add sc7180 DT schema

Hi,

I'll merge this through media tree but will drop interconnect properties
from example cause of failing make dt_binding_check.

We will add interconnect properties later on once the sc7180
interconnect driver is merged.

On 1/14/20 2:53 PM, Dikshita Agarwal wrote:
> Add new qcom,sc7180-venus DT binding schema.
> 
> Signed-off-by: Dikshita Agarwal <dikshita@...eaurora.org>
> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@...aro.org>
> ---
>  .../bindings/media/qcom,sc7180-venus.yaml          | 144 +++++++++++++++++++++
>  1 file changed, 144 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml
> new file mode 100644
> index 0000000..7b6a8fb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml
> @@ -0,0 +1,144 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Venus video encode and decode accelerators
> +
> +maintainers:
> +  - Stanimir Varbanov <stanimir.varbanov@...aro.org>
> +
> +description: |
> +  The Venus IP is a video encode and decode accelerator present
> +  on Qualcomm platforms
> +
> +properties:
> +  compatible:
> +    const: qcom,sc7180-venus
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 2
> +
> +  power-domain-names:
> +    items:
> +      - const: venus
> +      - const: vcodec0
> +
> +  clocks:
> +    maxItems: 5
> +
> +  clock-names:
> +    items:
> +      - const: core
> +      - const: iface
> +      - const: bus
> +      - const: vcodec0_core
> +      - const: vcodec0_bus
> +
> +  iommus:
> +    maxItems: 1
> +
> +  memory-region:
> +    maxItems: 1
> +
> +  interconnects:
> +    maxItems: 2
> +
> +  interconnect-names:
> +    items:
> +      - const: video-mem
> +      - const: cpu-cfg
> +
> +  video-decoder:
> +    type: object
> +
> +    properties:
> +      compatible:
> +        const: venus-decoder
> +
> +    required:
> +      - compatible
> +
> +    additionalProperties: false
> +
> +  video-encoder:
> +    type: object
> +
> +    properties:
> +      compatible:
> +        const: venus-encoder
> +
> +    required:
> +      - compatible
> +
> +    additionalProperties: false
> +
> +  video-firmware:
> +    type: object
> +
> +    description: |
> +      Firmware subnode is needed when the platform does not
> +      have TrustZone.
> +
> +    properties:
> +      iommus:
> +        maxItems: 1
> +
> +    required:
> +      - iommus
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - power-domains
> +  - power-domain-names
> +  - clocks
> +  - clock-names
> +  - iommus
> +  - memory-region
> +  - video-decoder
> +  - video-encoder
> +
> +examples:
> +  - |
> +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> +        #include <dt-bindings/clock/qcom,videocc-sc7180.h>
> +
> +        venus: video-codec@...0000 {
> +                compatible = "qcom,sc7180-venus";
> +                reg = <0 0x0aa00000 0 0xff000>;
> +                interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +                power-domains = <&videocc VENUS_GDSC>,
> +                                <&videocc VCODEC0_GDSC>;
> +                power-domain-names = "venus", "vcodec0";
> +                clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
> +                         <&videocc VIDEO_CC_VENUS_AHB_CLK>,
> +                         <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
> +                         <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
> +                         <&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
> +                clock-names = "core", "iface", "bus",
> +                              "vcodec0_core", "vcodec0_bus";
> +                iommus = <&apps_smmu 0x0c00 0x60>;
> +                memory-region = <&venus_mem>;
> +

>>>>

> +                interconnects = <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI1>,
> +                                <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
> +                interconnect-names = "video-mem", "cpu-cfg";

<<<<

> +
> +                video-decoder {
> +                        compatible = "venus-decoder";
> +                };
> +
> +                video-encoder {
> +                        compatible = "venus-encoder";
> +                };
> +        };
> 

-- 
regards,
Stan

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