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Message-ID: <20200217111519.29163-1-kishon@ti.com>
Date: Mon, 17 Feb 2020 16:45:17 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Rob Herring <robh+dt@...nel.org>, Tom Joseph <tjoseph@...ence.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Andrew Murray <amurray@...goodpenguin.co.uk>
CC: Mark Rutland <mark.rutland@....com>, <linux-pci@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Kishon Vijay Abraham I <kishon@...com>
Subject: [PATCH v2 0/2] dt-bindings: Convert Cadence PCIe RC/EP to DT Schema
Cadence PCIe IP is used by multiple SoC vendors (e.g. TI). Cadence
themselves have a validation platform for validating the PCIe IP which
is already in the upstream kernel. Right now the binding only exists for
Cadence platform and this will result in adding redundant binding schema
for any platform using Cadence PCIe core.
This series:
1) Create cdns-pcie.yaml which includes properties that are applicable
to both host mode and endpoint mode of Cadence PCIe core.
2) Create cdns-pcie-host.yaml to include properties that are specific to
host mode of Cadence PCIe core. cdns-pcie-host.yaml will include
cdns-pcie.yaml.
3) Create cdns-pcie-ep.yaml to include properties that are specific to
endpoint mode of Cadence PCIe core. cdns-pcie-ep.yaml will include
cdns-pcie.yaml.
4) Remove cdns,cdns-pcie-ep.txt and cdns,cdns-pcie-host.txt which had
the binding for Cadence "platform" and add cdns,cdns-pcie-host.yaml
and cdns,cdns-pcie-ep.yaml schema for Cadence Platform. The schema
for Cadence platform then includes schema for Cadence PCIe core.
Changes from v1:
*) Fix maximum values of num-lanes and cdns,no-bar-match-nbits
*) Fix example DT node for PCIe Endpoint.
Ref: Patches to convert Cadence driver to library
https://lkml.org/lkml/2019/11/11/317
Some of this was initially part of [1], but to accelerate it getting
into upstream, sending this as a separate series.
[1] -> [1] -> http://lore.kernel.org/r/20200106102058.19183-1-kishon@ti.com
Kishon Vijay Abraham I (2):
dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe
dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT
schema
.../bindings/pci/cdns,cdns-pcie-ep.txt | 27 -------
.../bindings/pci/cdns,cdns-pcie-ep.yaml | 48 ++++++++++++
.../bindings/pci/cdns,cdns-pcie-host.txt | 66 ----------------
.../bindings/pci/cdns,cdns-pcie-host.yaml | 76 +++++++++++++++++++
.../devicetree/bindings/pci/cdns-pcie-ep.yaml | 22 ++++++
.../bindings/pci/cdns-pcie-host.yaml | 27 +++++++
.../devicetree/bindings/pci/cdns-pcie.yaml | 45 +++++++++++
MAINTAINERS | 2 +-
8 files changed, 219 insertions(+), 94 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml
create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie.yaml
--
2.17.1
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