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Message-Id: <1581938021-16259-4-git-send-email-Anson.Huang@nxp.com>
Date: Mon, 17 Feb 2020 19:13:38 +0800
From: Anson Huang <Anson.Huang@....com>
To: robh+dt@...nel.org, mark.rutland@....com, shawnguo@...nel.org,
s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
devicetree@...r.kernel.org, u.kleine-koenig@...gutronix.de,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: Linux-imx@....com
Subject: [PATCH V3 RESEND 4/7] ARM: dts: imx6sx-sabreauto: Use new pin names with DCE/DTE for UART pins
Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this
is to distinguish the DCE/DTE functions.
Signed-off-by: Anson Huang <Anson.Huang@....com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
---
No change.
---
arch/arm/boot/dts/imx6sx-sabreauto.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index 315044c..8259244 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -229,8 +229,8 @@
pinctrl_uart1: uart1grp {
fsl,pins = <
- MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
- MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
+ MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1
+ MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1
>;
};
--
2.7.4
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