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Date:   Mon, 17 Feb 2020 14:45:45 +0100
From:   Benjamin Gaignard <benjamin.gaignard@...com>
To:     <lee.jones@...aro.org>, <robh+dt@...nel.org>,
        <mark.rutland@....com>, <mcoquelin.stm32@...il.com>,
        <alexandre.torgue@...com>, <daniel.lezcano@...aro.org>,
        <tglx@...utronix.de>, <fabrice.gasnier@...com>
CC:     <devicetree@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        Benjamin Gaignard <benjamin.gaignard@...com>
Subject: [PATCH v4 2/3] mfd: stm32: Add defines to be used for clkevent purpose

Add defines to be able to enable/clear irq and configure one shot mode.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...com>
---
version 4:
- move defines in mfd/stm32-lptimer.h

 include/linux/mfd/stm32-lptimer.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/mfd/stm32-lptimer.h b/include/linux/mfd/stm32-lptimer.h
index 605f62264825..90b20550c1c8 100644
--- a/include/linux/mfd/stm32-lptimer.h
+++ b/include/linux/mfd/stm32-lptimer.h
@@ -27,10 +27,15 @@
 #define STM32_LPTIM_CMPOK		BIT(3)
 
 /* STM32_LPTIM_ICR - bit fields */
+#define STM32_LPTIM_ARRMCF		BIT(1)
 #define STM32_LPTIM_CMPOKCF_ARROKCF	GENMASK(4, 3)
 
+/* STM32_LPTIM_IER - bit flieds */
+#define STM32_LPTIM_ARRMIE	BIT(1)
+
 /* STM32_LPTIM_CR - bit fields */
 #define STM32_LPTIM_CNTSTRT	BIT(2)
+#define STM32_LPTIM_SNGSTRT	BIT(1)
 #define STM32_LPTIM_ENABLE	BIT(0)
 
 /* STM32_LPTIM_CFGR - bit fields */
-- 
2.15.0

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