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Date: Mon, 17 Feb 2020 16:44:11 +0200 From: Vladimir Oltean <olteanv@...il.com> To: shawnguo@...nel.org, robh+dt@...nel.org, mark.rutland@....com, devicetree@...r.kernel.org Cc: andrew@...n.ch, vivien.didelot@...il.com, f.fainelli@...il.com, davem@...emloft.net, netdev@...r.kernel.org, linux-kernel@...r.kernel.org, Vladimir Oltean <vladimir.oltean@....com> Subject: [PATCH devicetree 1/4] arm64: dts: fsl: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE From: Vladimir Oltean <vladimir.oltean@....com> This specifier overrides the interrupt specifier with 3 cells from gic (/interrupt-controller@...0000), but in fact ENETC is not an interrupt controller, so the property is bogus. Interrupts used by the children of the ENETC RCIE must use the full 3-cell specifier required by the GIC. Fixes: 927d7f857542 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints") Signed-off-by: Vladimir Oltean <vladimir.oltean@....com> --- arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 0bf375ec959b..dfead691e509 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -683,7 +683,6 @@ reg = <0x01 0xf0000000 0x0 0x100000>; #address-cells = <3>; #size-cells = <2>; - #interrupt-cells = <1>; msi-parent = <&its>; device_type = "pci"; bus-range = <0x0 0x0>; -- 2.17.1
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