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Message-ID: <20200218210542.GA3483@bogus>
Date: Tue, 18 Feb 2020 15:05:42 -0600
From: Rob Herring <robh@...nel.org>
To: 周琰杰 (Zhou Yanjie)
<zhouyanjie@...yeetech.com>
Cc: linux-mips@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
paul@...pouillou.net, mturquette@...libre.com, sboyd@...nel.org,
robh+dt@...nel.org, mark.rutland@....com
Subject: Re: [PATCH v5 5/6] dt-bindings: clock: Add and reorder ABI for X1000.
On Sat, 15 Feb 2020 01:27:41 +0800, =?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20=28Zhou=20Yanjie=29?= wrote:
> The SSI clock of X1000 not like JZ4770 and JZ4780, they are not
> directly derived from the output of SSIPLL, but from the clock
> obtained by dividing the frequency by 2. "X1000_CLK_SSIPLL_DIV2"
> is added for this purpose, it must between "X1000_CLK_SSIPLL"
> and "X1000_CLK_SSIMUX", otherwise an error will occurs when
> initializing the clock. These ABIs are only used for X1000, and
> I'm sure that no other devicetree out there is using these ABIs,
> so we should be able to reorder them.
>
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@...yeetech.com>
> ---
>
> Notes:
> v5:
> New patch.
>
> include/dt-bindings/clock/x1000-cgu.h | 58 ++++++++++++++++++-----------------
> 1 file changed, 30 insertions(+), 28 deletions(-)
>
Acked-by: Rob Herring <robh@...nel.org>
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