linux-kernel - Re: [PATCH V2] mmc: sdhci-msm: Don't enable PWRSAVE

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Date:   Wed, 19 Feb 2020 00:38:12 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Veerabhadrarao Badiganti <vbadigan@...eaurora.org>
Cc:     Adrian Hunter <adrian.hunter@...el.com>,
        Asutosh Das <asutoshd@...eaurora.org>,
        Sahitya Tummala <stummala@...eaurora.org>,
        Sayali Lokhande <sayalil@...eaurora.org>, cang@...eaurora.org,
        Ram Prakash Gupta <rampraka@...eaurora.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        Ritesh Harjani <riteshh@...eaurora.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
Subject: Re: [PATCH V2] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain
 sdhc hosts

On Fri, 7 Feb 2020 at 13:05, Veerabhadrarao Badiganti
<vbadigan@...eaurora.org> wrote:
>
> From: Ritesh Harjani <riteshh@...eaurora.org>
>
> SDHC core with new 14lpp and later tech DLL should not enable
> PWRSAVE_DLL since such controller's internal gating cannot meet
> following MCLK requirement:
> When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
> must be switched on for at-least 1us before DATA starts coming.
>
> Adding support for this requirement.
>
> Signed-off-by: Ritesh Harjani <riteshh@...eaurora.org>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@...eaurora.org>

Applied for next, thanks!

Kind regards
Uffe


> --
>
> Changes since V1:
>   Condition was not correct in V1, which is corrected in V2
>
> --
> ---
>  drivers/mmc/host/sdhci-msm.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index c3a160c..aa5b610 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
>                 goto out;
>         }
>
> -       config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
> -       config |= CORE_PWRSAVE_DLL;
> -       writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
> +       /*
> +        * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
> +        * When MCLK is gated OFF, it is not gated for less than 0.5us
> +        * and MCLK must be switched on for at-least 1us before DATA
> +        * starts coming. Controllers with 14lpp and later tech DLL cannot
> +        * guarantee above requirement. So PWRSAVE_DLL should not be
> +        * turned on for host controllers using this DLL.
> +        */
> +       if (!msm_host->use_14lpp_dll_reset) {
> +               config = readl_relaxed(host->ioaddr +
> +                               msm_offset->core_vendor_spec3);
> +               config |= CORE_PWRSAVE_DLL;
> +               writel_relaxed(config, host->ioaddr +
> +                               msm_offset->core_vendor_spec3);
> +       }
>
>         /*
>          * Drain writebuffer to ensure above DLL calibration
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project