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Message-ID: <20200218135021.GI4232@sirena.org.uk>
Date: Tue, 18 Feb 2020 13:50:21 +0000
From: Mark Brown <broonie@...nel.org>
To: Shobhit Srivastava <shobhit.srivastava@...el.com>
Cc: daniel@...que.org, haojian.zhuang@...il.com,
robert.jarzmik@...e.fr, linux-arm-kernel@...ts.infradead.org,
linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
furquan@...gle.com, rajatja@...gle.com, evgreen@...gle.com,
andriy.shevchenko@...ux.intel.com
Subject: Re: [PATCH 0/1] Enable SSP controller for CS toggle
On Tue, Feb 18, 2020 at 07:19:05PM +0530, Shobhit Srivastava wrote:
>
> SPI CS assert may not always be accompanied by data. There are cases
> where we want to assert CS, wait and then deassert CS. There is no
> clocking or reading required. On Intel CNL LPSS controller, it was
Please don't send cover letters for single patches, if there is anything
that needs saying put it in the changelog of the patch or after the ---
if it's administrative stuff. This reduces mail volume and ensures that
any important information is recorded in the changelog rather than being
lost.
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