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Date:   Tue, 18 Feb 2020 11:13:16 -0600
From:   Rob Herring <robh@...nel.org>
To:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        soc@...nel.org, Andre Przywara <andre.przywara@....com>,
        Robert Richter <rrichter@...vell.com>,
        Jon Loeliger <jdl@....com>, Alexander Graf <graf@...zon.com>,
        Matthias Brugger <mbrugger@...e.com>,
        Mark Langsdorf <mlangsdo@...hat.com>
Cc:     Alex Williamson <alex.williamson@...hat.com>,
        Borislav Petkov <bp@...en8.de>,
        Cornelia Huck <cohuck@...hat.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        "David S. Miller" <davem@...emloft.net>,
        devicetree@...r.kernel.org, Eric Auger <eric.auger@...hat.com>,
        iommu@...ts.linux-foundation.org,
        James Morse <james.morse@....com>,
        Jens Axboe <axboe@...nel.dk>, Joerg Roedel <joro@...tes.org>,
        kvm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-edac@...r.kernel.org, linux-ide@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        netdev@...r.kernel.org, "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Robin Murphy <robin.murphy@....com>,
        Stephen Boyd <sboyd@...nel.org>,
        Tony Luck <tony.luck@...el.com>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        Will Deacon <will@...nel.org>
Subject: [RFC PATCH 06/11] iommu: arm-smmu: Remove Calxeda secure mode quirk

Cc: Will Deacon <will@...nel.org>
Cc: Robin Murphy <robin.murphy@....com>
Cc: Joerg Roedel <joro@...tes.org>
Cc: iommu@...ts.linux-foundation.org
Signed-off-by: Rob Herring <robh@...nel.org>
---
Do not apply yet.

 drivers/iommu/arm-smmu-impl.c | 43 -----------------------------------
 1 file changed, 43 deletions(-)

diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c
index 74d97a886e93..a3be8712d27f 100644
--- a/drivers/iommu/arm-smmu-impl.c
+++ b/drivers/iommu/arm-smmu-impl.c
@@ -9,45 +9,6 @@

 #include "arm-smmu.h"

-
-static int arm_smmu_gr0_ns(int offset)
-{
-	switch(offset) {
-	case ARM_SMMU_GR0_sCR0:
-	case ARM_SMMU_GR0_sACR:
-	case ARM_SMMU_GR0_sGFSR:
-	case ARM_SMMU_GR0_sGFSYNR0:
-	case ARM_SMMU_GR0_sGFSYNR1:
-	case ARM_SMMU_GR0_sGFSYNR2:
-		return offset + 0x400;
-	default:
-		return offset;
-	}
-}
-
-static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page,
-			    int offset)
-{
-	if (page == ARM_SMMU_GR0)
-		offset = arm_smmu_gr0_ns(offset);
-	return readl_relaxed(arm_smmu_page(smmu, page) + offset);
-}
-
-static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page,
-			      int offset, u32 val)
-{
-	if (page == ARM_SMMU_GR0)
-		offset = arm_smmu_gr0_ns(offset);
-	writel_relaxed(val, arm_smmu_page(smmu, page) + offset);
-}
-
-/* Since we don't care for sGFAR, we can do without 64-bit accessors */
-static const struct arm_smmu_impl calxeda_impl = {
-	.read_reg = arm_smmu_read_ns,
-	.write_reg = arm_smmu_write_ns,
-};
-
-
 struct cavium_smmu {
 	struct arm_smmu_device smmu;
 	u32 id_base;
@@ -166,10 +127,6 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu)
 		break;
 	}

-	if (of_property_read_bool(smmu->dev->of_node,
-				  "calxeda,smmu-secure-config-access"))
-		smmu->impl = &calxeda_impl;
-
 	if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-500"))
 		return qcom_smmu_impl_init(smmu);

--
2.20.1

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