linux-kernel - RE: [PATCH RFC 0/7] perf pmu-events: Support event aliasing for system PMUs

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Message-ID: <DB7PR04MB46188F06D6CEA1430712E648E6100@DB7PR04MB4618.eurprd04.prod.outlook.com>
Date:   Wed, 19 Feb 2020 01:55:28 +0000
From:   Joakim Zhang <qiangqing.zhang@....com>
To:     Mark Rutland <mark.rutland@....com>,
        John Garry <john.garry@...wei.com>
CC:     "ak@...ux.intel.com" <ak@...ux.intel.com>,
        "suzuki.poulose@....com" <suzuki.poulose@....com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        Will Deacon <will@...nel.org>, Linuxarm <linuxarm@...wei.com>,
        "acme@...nel.org" <acme@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Zhangshaokun <zhangshaokun@...ilicon.com>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "james.clark@....com" <james.clark@....com>,
        "namhyung@...nel.org" <namhyung@...nel.org>,
        "jolsa@...hat.com" <jolsa@...hat.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "robin.murphy@....com" <robin.murphy@....com>,
        Sudeep Holla <sudeep.holla@....com>
Subject: RE: [PATCH RFC 0/7] perf pmu-events: Support event aliasing for
 system PMUs


> -----Original Message-----
> From: Mark Rutland <mark.rutland@....com>
> Sent: 2020年2月19日 2:14
> To: John Garry <john.garry@...wei.com>
> Cc: ak@...ux.intel.com; Joakim Zhang <qiangqing.zhang@....com>;
> suzuki.poulose@....com; peterz@...radead.org; Will Deacon
> <will@...nel.org>; Linuxarm <linuxarm@...wei.com>; acme@...nel.org;
> linux-kernel@...r.kernel.org; Zhangshaokun <zhangshaokun@...ilicon.com>;
> alexander.shishkin@...ux.intel.com; mingo@...hat.com;
> james.clark@....com; namhyung@...nel.org; jolsa@...hat.com;
> linux-arm-kernel@...ts.infradead.org; robin.murphy@....com; Sudeep Holla
> <sudeep.holla@....com>
> Subject: Re: [PATCH RFC 0/7] perf pmu-events: Support event aliasing for
> system PMUs

[...]
> > And typically most PMU HW would have no ID reg, so where to even get
> > this identification info? Joakim Zhang seems to have this problem for
> > the imx8 DDRC PMU driver.
> 
> For imx8, the DT compat string or additional properties on the DDRC node
> could be used to imply the id.

Hi Mark,

Yes, actually we can expose something like DDRC_ID to indicate each specific DDR controller, to point out the filter feature.
But, even the SoCs integrated the same DDRC_ID, just say that they have the same DDRC controller.

From user space, the usage is different, for example:

i.MX8MM and i.MX8MN, they use the same driver(DDRC_ID) and cortex-a53 integrated.

If we want to monitor VPU, their *master id* is different from SoCs.
On i.MX8MM, event is imx8_ddr0/axid-read,axi_id=0x08/
On i.MX8MN, event is imx8_ddr0/axid-read,axi_id=0x12/

I try to write a JSON file to use these events, for now, I only can locate the file at the directory: tools/perf/pmu-events/arch/arm64/arm/cortex-a53/

Perf tool loads all events when CPUID matched, which is now unreasonable, we want related events are loaded for specific SoC.

All events will also be loaded if we use DDRC_ID to match in the future, this seems to not be a good ideal.

Best Regards,
Joakim Zhang

[....]