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Message-Id: <1582099197-20327-15-git-send-email-peng.fan@nxp.com>
Date:   Wed, 19 Feb 2020 15:59:57 +0800
From:   peng.fan@....com
To:     shawnguo@...nel.org, s.hauer@...gutronix.de, sboyd@...nel.org,
        robh+dt@...nel.org, viresh.kumar@...aro.org, rjw@...ysocki.net
Cc:     kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
        Anson.Huang@....com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, abel.vesa@....com,
        Peng Fan <peng.fan@....com>
Subject: [PATCH v2 14/14] [Do not Apply] ARM: dts: imx7ulp: add cpu OPP points

From: Peng Fan <peng.fan@....com>

Add cpu OPP points. voltage part not ready, only clk freq now.

Signed-off-by: Peng Fan <peng.fan@....com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index 32c218123662..a5bf6605f729 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -41,6 +41,34 @@
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <0xf00>;
+			clocks = <&smc1 IMX7ULP_CLK_ARM>,
+				 <&scg1 IMX7ULP_CLK_CORE>,
+				 <&scg1 IMX7ULP_CLK_SYS_SEL>,
+				 <&scg1 IMX7ULP_CLK_HSRUN_CORE>,
+				 <&scg1 IMX7ULP_CLK_HSRUN_SYS_SEL>,
+				 <&scg1 IMX7ULP_CLK_FIRC>;
+			clock-names = "arm", "core", "scs_sel",
+				      "hsrun_core", "hsrun_scs_sel",
+				      "firc";
+			clock-frequency = <500210000>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
+
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-500210000 {
+			opp-hz = /bits/ 64 <500210000>;
+			/*opp-microvolt = <1025000>;*/
+			clock-latency-ns = <150000>;
+		};
+
+		opp-720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			/*opp-microvolt = <1125000>;*/
+			clock-latency-ns = <150000>;
 		};
 	};
 
-- 
2.16.4

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