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Message-ID: <16d27f75-8157-7a92-ae61-b5b3ab05bdd9@st.com>
Date: Wed, 19 Feb 2020 12:33:31 +0100
From: Alexandre Torgue <alexandre.torgue@...com>
To: Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <maz@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>
CC: <marex@...x.de>, <linux-gpio@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 1/2] irqchip/stm32: Add irq retrigger support
Fix Marc email address
On 2/18/20 2:12 PM, Alexandre Torgue wrote:
> This commit introduces retrigger support for stm32_ext_h chip.
> It consists to rise the GIC interrupt mapped to an EXTI line.
>
> Signed-off-by: Alexandre Torgue <alexandre.torgue@...com>
>
> diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
> index e00f2fa27f00..c971d115edb4 100644
> --- a/drivers/irqchip/irq-stm32-exti.c
> +++ b/drivers/irqchip/irq-stm32-exti.c
> @@ -604,12 +604,24 @@ static void stm32_exti_h_syscore_deinit(void)
> unregister_syscore_ops(&stm32_exti_h_syscore_ops);
> }
>
> +static int stm32_exti_h_retrigger(struct irq_data *d)
> +{
> + struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
> + const struct stm32_exti_bank *stm32_bank = chip_data->reg_bank;
> + void __iomem *base = chip_data->host_data->base;
> + u32 mask = BIT(d->hwirq % IRQS_PER_BANK);
> +
> + writel_relaxed(mask, base + stm32_bank->swier_ofst);
> +
> + return irq_chip_retrigger_hierarchy(d);
> +}
> +
> static struct irq_chip stm32_exti_h_chip = {
> .name = "stm32-exti-h",
> .irq_eoi = stm32_exti_h_eoi,
> .irq_mask = stm32_exti_h_mask,
> .irq_unmask = stm32_exti_h_unmask,
> - .irq_retrigger = irq_chip_retrigger_hierarchy,
> + .irq_retrigger = stm32_exti_h_retrigger,
> .irq_set_type = stm32_exti_h_set_type,
> .irq_set_wake = stm32_exti_h_set_wake,
> .flags = IRQCHIP_MASK_ON_SUSPEND,
>
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