linux-kernel - Re: [PATCH RFC 0/7] perf pmu-events: Support event aliasing for system PMUs

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Message-ID: <476e386b-c032-71bb-d8f8-1701292636b4@huawei.com>
Date:   Wed, 19 Feb 2020 14:28:10 +0000
From:   John Garry <john.garry@...wei.com>
To:     Joakim Zhang <qiangqing.zhang@....com>,
        Mark Rutland <mark.rutland@....com>
CC:     "ak@...ux.intel.com" <ak@...ux.intel.com>,
        "suzuki.poulose@....com" <suzuki.poulose@....com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "Will Deacon" <will@...nel.org>, Linuxarm <linuxarm@...wei.com>,
        "acme@...nel.org" <acme@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Zhangshaokun <zhangshaokun@...ilicon.com>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "james.clark@....com" <james.clark@....com>,
        "namhyung@...nel.org" <namhyung@...nel.org>,
        "jolsa@...hat.com" <jolsa@...hat.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "robin.murphy@....com" <robin.murphy@....com>,
        Sudeep Holla <sudeep.holla@....com>
Subject: Re: [PATCH RFC 0/7] perf pmu-events: Support event aliasing for
 system PMUs


>>> i.MX8MM and i.MX8MN, they use the same driver(DDRC_ID) and cortex-a53
>> integrated.
>>>
>>> If we want to monitor VPU, their *master id* is different from SoCs.
>>> On i.MX8MM, event is imx8_ddr0/axid-read,axi_id=0x08/ On i.MX8MN,
>>> event is imx8_ddr0/axid-read,axi_id=0x12/
>>>

So it seems that this master id and the axi_id are the same, which is 
some filtering key. Indeed, the actual event number is the same between 
SoC implementations.

And metric groups do support filtering, AFAIU.

>>> I try to write a JSON file to use these events, for now, I only can
>>> locate the file at the directory:
>>> tools/perf/pmu-events/arch/arm64/arm/cortex-a53/
>>>
>>> Perf tool loads all events when CPUID matched, which is now unreasonable,
>> we want related events are loaded for specific SoC.
>>
>> so we could have a folder like .../arch/arm64/nxp/system for these JSONs. The
>> perf tool can be updated to handle CPU and system events in separate folders.
>>
>>>
>>> All events will also be loaded if we use DDRC_ID to match in the future, this
>> seems to not be a good ideal.
>>
>> The important part is knowing which events are supported per implementation.
>> Is there any method in the driver of knowing the specific implementation, like
>> any DT compat string? Least preferred option would be DT machine ID.
> 
> I think, NO, master id could be different even they use the same DT compatible string.

Are you sure? Checking the dts files for your SoCs, I see this:

~/kernel-dev6/arch/arm64$ git grep  "fsl,imx8m-ddr-pmu"
boot/dts/freescale/imx8mm.dtsi:                 compatible = 
"fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
boot/dts/freescale/imx8mn.dtsi:                 compatible = 
"fsl,imx8mn-ddr-pmu", "fsl,imx8m-ddr-pmu";
boot/dts/freescale/imx8mq.dtsi:                 compatible = 
"fsl,imx8mq-ddr-pmu", "fsl,imx8m-ddr-pmu";

So it seems that you could use "fsl,imx8mm-ddr-pmu" vs 
"fsl,imx8mn-ddr-pmu" to differentiate, right?

John