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Message-ID: <15d0ac5f-4919-5852-cd95-93c24d8bdbb9@ti.com>
Date: Wed, 19 Feb 2020 16:29:20 +0200
From: Roger Quadros <rogerq@...com>
To: Rob Herring <robh+dt@...nel.org>
CC: Christoph Hellwig <hch@....de>,
Robin Murphy <robin.murphy@....com>,
Péter Ujfalusi <peter.ujfalusi@...com>,
Murali Karicheri <m-karicheri2@...com>,
"Nori, Sekhar" <nsekhar@...com>, "Anna, Suman" <s-anna@...com>,
Stefan Wahren <stefan.wahren@...e.com>,
Andreas Färber <afaerber@...e.de>,
Hans Verkuil <hverkuil@...all.nl>,
<devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Nishanth Menon <nm@...com>,
"hdegoede@...hat.com" <hdegoede@...hat.com>,
Vignesh Raghavendra <vigneshr@...com>
Subject: Re: dma_mask limited to 32-bits with OF platform device
Rob,
On 18/02/2020 19:22, Rob Herring wrote:
> On Tue, Feb 18, 2020 at 2:28 AM Roger Quadros <rogerq@...com> wrote:
>>
>> Chrishtoph,
>>
>> The branch works fine for SATA on DRA7 with CONFIG_LPAE once I
>> have the below DT fix.
>>
>> Do you intend to send these fixes to -stable?
>>
>> ------------------------- arch/arm/boot/dts/dra7.dtsi -------------------------
>> index d78b684e7fca..853ecf3cfb37 100644
>> @@ -645,6 +645,8 @@
>> sata: sata@...41100 {
>> compatible = "snps,dwc-ahci";
>> reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
>> + #size-cells = <2>;
>> + dma-ranges = <0x00000000 0x00000000 0x1 0x00000000>;
>
> dma-ranges should be in the parent (bus) node, not the device node.
I didn't understand why.
There are many devices on the parent bus node and all devices might not have the 32-bit DMA limit
the SATA controller has.
SATA controller is the bus master and the ATA devices are children of the SATA controller.
From Documentation/devicetree/booting-without-of.txt
* DMA Bus master
Optional property:
- dma-ranges: <prop-encoded-array> encoded as arbitrary number of triplets of
(child-bus-address, parent-bus-address, length). Each triplet specified
describes a contiguous DMA address range.
The dma-ranges property is used to describe the direct memory access (DMA)
structure of a memory-mapped bus whose device tree parent can be accessed
from DMA operations originating from the bus. It provides a means of
defining a mapping or translation between the physical address space of
the bus and the physical address space of the parent of the bus.
(for more information see the Devicetree Specification)
* DMA Bus child
Optional property:
- dma-ranges: <empty> value. if present - It means that DMA addresses
translation has to be enabled for this device.
- dma-coherent: Present if dma operations are coherent
>
>> interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
>> phys = <&sata_phy>;
>> phy-names = "sata-phy";
>>
>>
>> cheers,
>> -roger
>>
>> On 17/02/2020 15:21, Christoph Hellwig wrote:
>>> Roger,
>>>
>>> can you try the branch below and check if that helps?
>>>
>>> git://git.infradead.org/users/hch/misc.git arm-dma-bus-limit
>>>
>>> Gitweb:
>>>
>>> http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/arm-dma-bus-limit
>>>
>>
>> --
>> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
>> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
--
cheers,
-roger
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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