linux-kernel - Re: [PATCH RFC] Toggle fifo write clk after ungating sdcc clk

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Date:   Thu, 20 Feb 2020 07:51:26 -0800
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Sayali Lokhande <sayalil@...eaurora.org>
Cc:     adrian.hunter@...el.com, robh+dt@...nel.org,
        ulf.hansson@...aro.org, asutoshd@...eaurora.org,
        stummala@...eaurora.org, ppvk@...eaurora.org,
        rampraka@...eaurora.org, vbadigan@...eaurora.org, sboyd@...nel.org,
        georgi.djakov@...aro.org, mka@...omium.org,
        linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        agross@...nel.org, linux-mmc-owner@...r.kernel.org
Subject: Re: [PATCH RFC] Toggle fifo write clk after ungating sdcc clk

On Thu 20 Feb 01:20 PST 2020, Sayali Lokhande wrote:

> During GCC level clock gating of MCLK, the async FIFO
> gets into some hang condition, such that for the next
> transfer after MCLK ungating, first bit of CMD response
> doesn't get written in to the FIFO. This cause the CPSM
> to hang eventually leading to SW timeout.
> 
> To fix the issue, toggle the FIFO write clock after
> MCLK ungated to get the FIFO pointers and flags to
> valid states.
> 

Please don't provide cover letters for a single patch.

Regards,
Bjorn

> Ram Prakash Gupta (1):
>   mmc: sdhci-msm: Toggle fifo write clk after ungating sdcc clk
> 
>  drivers/mmc/host/sdhci-msm.c | 43 +++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
> 
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project