linux-kernel - RE: [PATCHv10 08/13] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors

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Message-ID: <DB8PR04MB6747E9173765F4113350ABF584EC0@DB8PR04MB6747.eurprd04.prod.outlook.com>
Date:   Mon, 24 Feb 2020 05:50:18 +0000
From:   "Z.q. Hou" <zhiqiang.hou@....com>
To:     Andrew Murray <amurray@...goodpenguin.co.uk>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "andrew.murray@....com" <andrew.murray@....com>,
        "arnd@...db.de" <arnd@...db.de>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "l.subrahmanya@...iveil.co.in" <l.subrahmanya@...iveil.co.in>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "m.karthikeyan@...iveil.co.in" <m.karthikeyan@...iveil.co.in>,
        Leo Li <leoyang.li@....com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Xiaowei Bao <xiaowei.bao@....com>
Subject: RE: [PATCHv10 08/13] PCI: mobiveil: Add 8-bit and 16-bit CSR register
 accessors

Hi Andrew,

Thanks a lot for your review!

Thanks,
Zhiqiang

> -----Original Message-----
> From: Andrew Murray <amurray@...goodpenguin.co.uk>
> Sent: 2020年2月21日 1:29
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> bhelgaas@...gle.com; robh+dt@...nel.org; andrew.murray@....com;
> arnd@...db.de; mark.rutland@....com; l.subrahmanya@...iveil.co.in;
> shawnguo@...nel.org; m.karthikeyan@...iveil.co.in; Leo Li
> <leoyang.li@....com>; lorenzo.pieralisi@....com;
> catalin.marinas@....com; will.deacon@....com; Mingkai Hu
> <mingkai.hu@....com>; M.h. Lian <minghuan.lian@....com>; Xiaowei Bao
> <xiaowei.bao@....com>
> Subject: Re: [PATCHv10 08/13] PCI: mobiveil: Add 8-bit and 16-bit CSR
> register accessors
> 
> On Thu, Feb 13, 2020 at 12:06:39PM +0800, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> >
> > There are some 8-bit and 16-bit registers in PCIe configuration space,
> > so add these accessors accordingly.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > Reviewed-by: Minghuan Lian <Minghuan.Lian@....com>
> > Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@...iveil.co.in>
> 
> Reviewed-by: Andrew Murray <amurray@...goodpenguin.co.uk>
> 
> > ---
> > V10:
> >  - Changed the return types to reflect the size of the access.
> >
> >  .../pci/controller/mobiveil/pcie-mobiveil.h   | 23
> +++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > index 623c5f0c4441..72c62b4d8f7b 100644
> > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
> > @@ -182,10 +182,33 @@ static inline u32 mobiveil_csr_readl(struct
> mobiveil_pcie *pcie, u32 off)
> >  	return mobiveil_csr_read(pcie, off, 0x4);  }
> >
> > +static inline u16 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32
> > +off) {
> > +	return mobiveil_csr_read(pcie, off, 0x2); }
> > +
> > +static inline u8 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32
> > +off) {
> > +	return mobiveil_csr_read(pcie, off, 0x1); }
> > +
> > +
> >  static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val,
> >  				       u32 off)
> >  {
> >  	mobiveil_csr_write(pcie, val, off, 0x4);  }
> >
> > +static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u16 val,
> > +				       u32 off)
> > +{
> > +	mobiveil_csr_write(pcie, val, off, 0x2); }
> > +
> > +static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u8 val,
> > +				       u32 off)
> > +{
> > +	mobiveil_csr_write(pcie, val, off, 0x1); }
> > +
> >  #endif /* _PCIE_MOBIVEIL_H */
> > --
> > 2.17.1
> >