[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAKwvOd=9WaeVjvgkkLf5scFaNTpx28d4FAse62vv4X_mEwqRJA@mail.gmail.com>
Date: Tue, 25 Feb 2020 12:27:26 -0800
From: Nick Desaulniers <ndesaulniers@...gle.com>
To: Ard Biesheuvel <ard.biesheuvel@...aro.org>
Cc: Stefan Agner <stefan@...er.ch>, Arnd Bergmann <arnd@...db.de>,
LKML <linux-kernel@...r.kernel.org>,
Jian Cai <jiancai@...gle.com>,
clang-built-linux <clang-built-linux@...glegroups.com>,
Manoj Gupta <manojgupta@...gle.com>,
Russell King <linux@...linux.org.uk>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] ARM: use assembly mnemonics for VFP register access
On Tue, Feb 25, 2020 at 11:33 AM Ard Biesheuvel
<ard.biesheuvel@...aro.org> wrote:
>
> On Tue, 25 Feb 2020 at 20:10, Nick Desaulniers <ndesaulniers@...gle.com> wrote:
> > Ah, this is only when streaming to assembly. Looks like they have the
> > same encoding, and produce the same disassembly. (Godbolt emits
> > assembly by default, and has the option to compile, then disassemble).
> > If I take my case from godbolt above:
> >
> > ➜ /tmp arm-linux-gnueabihf-gcc -O2 -c x.c
> > ➜ /tmp llvm-objdump -dr x.o
> >
> > x.o: file format elf32-arm-little
> >
> >
> > Disassembly of section .text:
> >
> > 00000000 bar:
> > 0: f1 ee 10 0a vmrs r0, fpscr
> > 4: 70 47 bx lr
> > 6: 00 bf nop
> >
> > 00000008 baz:
> > 8: f1 ee 10 0a vmrs r0, fpscr
> > c: 70 47 bx lr
> > e: 00 bf nop
> >
> > So indeed a similar encoding exists for the two different assembler
> > instructions.
>
> Does that hold for ARM (A32) instructions as well?
TIL -mthumb is the default for arm-linux-gnueabihf-gcc -O2.
➜ /tmp arm-linux-gnueabihf-gcc -O2 -c x.c -marm
➜ /tmp llvm-objdump -dr x.o
x.o: file format elf32-arm-little
Disassembly of section .text:
00000000 bar:
0: 10 0a f1 ee vmrs r0, fpscr
4: 1e ff 2f e1 bx lr
00000008 baz:
8: 10 0a f1 ee vmrs r0, fpscr
c: 1e ff 2f e1 bx lr
^ Just to show the matching encoding.
--
Thanks,
~Nick Desaulniers
Powered by blists - more mailing lists