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Message-Id: <20200225070545.4482-5-pankaj.laxminarayan.bharadiya@intel.com>
Date: Tue, 25 Feb 2020 12:35:44 +0530
From: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@...el.com>
To: jani.nikula@...ux.intel.com, daniel@...ll.ch,
intel-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
ville.syrjala@...ux.intel.com, airlied@...ux.ie,
maarten.lankhorst@...ux.intel.com, tzimmermann@...e.de,
mripard@...nel.org, mihail.atanassov@....com,
Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@...el.com>
Cc: pankaj.laxminarayan.bharadiya@...el.com,
linux-kernel@...r.kernel.org, ankit.k.nautiyal@...el.com
Subject: [RFC][PATCH 4/5] drm/i915: Introduce scaling filter related registers and bit fields.
Introduce scaler registers and bit fields needed to configure the
scaling filter in prgrammed mode and configure scaling filter
coefficients.
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@...el.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@...el.com>
---
drivers/gpu/drm/i915/i915_reg.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 34923b1c284c..bba4ad3be611 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7289,6 +7289,18 @@ enum {
#define _PS_ECC_STAT_2B 0x68AD0
#define _PS_ECC_STAT_1C 0x691D0
+#define _PS_COEF_SET0_INDEX_1A 0x68198
+#define _PS_COEF_SET0_INDEX_2A 0x68298
+#define _PS_COEF_SET0_INDEX_1B 0x68998
+#define _PS_COEF_SET0_INDEX_2B 0x68A98
+
+#define _PS_COEF_SET0_DATA_1A 0x6819C
+#define _PS_COEF_SET0_DATA_2A 0x6829C
+#define _PS_COEF_SET0_DATA_1B 0x6899C
+#define _PS_COEF_SET0_DATA_2B 0x68A9C
+
+#define _PS_COEE_INDEX_AUTO_INC (1 << 10)
+
#define _ID(id, a, b) _PICK_EVEN(id, a, b)
#define SKL_PS_CTRL(pipe, id) _MMIO_PIPE(pipe, \
_ID(id, _PS_1A_CTRL, _PS_2A_CTRL), \
@@ -7318,6 +7330,14 @@ enum {
_ID(id, _PS_ECC_STAT_1A, _PS_ECC_STAT_2A), \
_ID(id, _PS_ECC_STAT_1B, _PS_ECC_STAT_2B))
+#define SKL_PS_COEF_INDEX_SET0(pipe, id) _MMIO_PIPE(pipe, \
+ _ID(id, _PS_COEF_SET0_INDEX_1A, _PS_COEF_SET0_INDEX_2A), \
+ _ID(id, _PS_COEF_SET0_INDEX_1B, _PS_COEF_SET0_INDEX_2B))
+
+#define SKL_PS_COEF_DATA_SET0(pipe, id) _MMIO_PIPE(pipe, \
+ _ID(id, _PS_COEF_SET0_DATA_1A, _PS_COEF_SET0_DATA_2A), \
+ _ID(id, _PS_COEF_SET0_DATA_1B, _PS_COEF_SET0_DATA_2B))
+
/* legacy palette */
#define _LGC_PALETTE_A 0x4a000
#define _LGC_PALETTE_B 0x4a800
--
2.23.0
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