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Message-ID: <20200225172734.GA29404@bogus>
Date: Tue, 25 Feb 2020 11:27:34 -0600
From: Rob Herring <robh@...nel.org>
To: richard.gong@...ux.intel.com
Cc: gregkh@...uxfoundation.org, mdf@...nel.org, robh+dt@...nel.org,
mark.rutland@....com, dinguyen@...nel.org,
linux-fpga@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, richard.gong@...ux.intel.com,
Richard Gong <richard.gong@...el.com>
Subject: Re: [PATCHv1 1/7] dt-bindings: fpga: add compatible value to
Stratix10 SoC FPGA manager binding
On Fri, 14 Feb 2020 10:00:46 -0600, richard.gong@...ux.intel.com wrote:
> From: Richard Gong <richard.gong@...el.com>
>
> Add a compatible property value to Stratix10 SoC FPGA manager binding file
>
> Signed-off-by: Richard Gong <richard.gong@...el.com>
> ---
> .../devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring <robh@...nel.org>
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