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Message-Id: <1582600627-28415-1-git-send-email-peng.fan@nxp.com>
Date: Tue, 25 Feb 2020 11:17:05 +0800
From: peng.fan@....com
To: shawnguo@...nel.org, s.hauer@...gutronix.de,
jassisinghbrar@...il.com, o.rempel@...gutronix.de
Cc: kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
Anson.Huang@....com, leonard.crestez@....com, aisheng.dong@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Peng Fan <peng.fan@....com>
Subject: [PATCH V2 0/2] mailbox/firmware: imx: support SCU channel type
From: Peng Fan <peng.fan@....com>
V2:
Drop patch 1/3 which added fsl,scu property
Force to use scu channel type when machine has node compatible "fsl,imx-scu"
Force imx-scu to use fast_ipc
I not found a generic method to make SCFW message generic enough, SCFW
message is not fixed length including TX and RX. And it use TR0/RR0
interrupt.
It might need https://patchwork.kernel.org/patch/11395247/ to avoid
build break.
V1:
Sorry to bind the mailbox/firmware patch together. This is make it
to understand what changed to support using 1 TX and 1 RX channel
for SCFW message.
Per i.MX8QXP Reference mannual, there are several message using
examples. One of them is:
Passing short messages: Transmit register(s) can be used to pass
short messages from one to four words in length. For example,
when a four-word message is desired, only one of the registers
needs to have its corresponding interrupt enable bit set at the
receiver side.
This patchset is to using this for SCFW message to replace four TX
and four RX method.
Pachset based on i.MX Shawn's for-next branch, commit fd7eba9fa1f534b710.
To test this patchset, I applied the below diff:
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index fb5f752b15fe..c5636624726e 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -140,17 +140,11 @@
scu {
compatible = "fsl,imx-scu";
- mbox-names = "tx0", "tx1", "tx2", "tx3",
- "rx0", "rx1", "rx2", "rx3",
+ mbox-names = "tx0",
+ "rx0",
"gip3";
mboxes = <&lsio_mu1 0 0
- &lsio_mu1 0 1
- &lsio_mu1 0 2
- &lsio_mu1 0 3
&lsio_mu1 1 0
- &lsio_mu1 1 1
- &lsio_mu1 1 2
- &lsio_mu1 1 3
&lsio_mu1 3 3>;
clk: clock-controller {
Peng Fan (2):
mailbox: imx: support SCU channel type
firmware: imx-scu: Support one TX and one RX
drivers/firmware/imx/imx-scu.c | 48 ++++++++++++++++++++++++++++++++----------
drivers/mailbox/imx-mailbox.c | 46 ++++++++++++++++++++++++++++++++++++----
2 files changed, 79 insertions(+), 15 deletions(-)
base-commit: fd7eba9fa1f534b7102f4762e25c991f78ec283d
--
2.16.4
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