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Message-Id: <1582692043-683-2-git-send-email-peng.fan@nxp.com>
Date: Wed, 26 Feb 2020 12:40:40 +0800
From: peng.fan@....com
To: shawnguo@...nel.org, s.hauer@...gutronix.de,
jassisinghbrar@...il.com, o.rempel@...gutronix.de,
robh+dt@...nel.org
Cc: kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
Anson.Huang@....com, leonard.crestez@....com, aisheng.dong@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Peng Fan <peng.fan@....com>
Subject: [PATCH V3 1/4] dt-bindings: mailbox: imx-mu: add SCU MU support
From: Peng Fan <peng.fan@....com>
i.MX8/8X SCU MU is dedicated for communication between SCU
and Cortex-A cores from hardware design, it could not be reused
for other purpose. To use SCU MU more effectivly, add "fsl,imx8-scu-mu"
compatile to support fast IPC.
Signed-off-by: Peng Fan <peng.fan@....com>
---
V3:
New patch
Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
index 9c43357c5924..31486c9f6443 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
@@ -23,6 +23,8 @@ Required properties:
be included together with SoC specific compatible.
There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
compatible to support it.
+ To communicate with i.MX8 SCU, "fsl,imx8-mu-scu" could be
+ used for fast IPC
- reg : Should contain the registers location and length
- interrupts : Interrupt number. The interrupt specifier format depends
on the interrupt controller parent.
--
2.16.4
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