lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1582817954.3.5@crapouillou.net>
Date:   Thu, 27 Feb 2020 12:39:14 -0300
From:   Paul Cercueil <paul@...pouillou.net>
To:     "H. Nikolaus Schaller" <hns@...delico.com>
Cc:     PrasannaKumar Muralidharan <prasannatsmkumar@...il.com>,
        Andreas Kemnade <andreas@...nade.info>,
        Mathieu Malaterre <malat@...ian.org>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Paul Burton <paulburton@...nel.org>,
        Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jonathan Cameron <Jonathan.Cameron@...wei.com>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Kees Cook <keescook@...omium.org>,
        Andi Kleen <ak@...ux.intel.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-mips@...r.kernel.org, letux-kernel@...nphoenux.org,
        kernel@...a-handheld.com
Subject: Re: [PATCH v6 5/6] MIPS: DTS: JZ4780: define node for JZ4780 efuse



Le jeu., févr. 27, 2020 at 16:26, H. Nikolaus Schaller 
<hns@...delico.com> a écrit :
> Hi Paul,
> 
>>  Am 27.02.2020 um 15:57 schrieb Paul Cercueil <paul@...pouillou.net>:
>> 
>>  Hi Nikolaus,
>> 
>> 
>>  Le mer., févr. 26, 2020 at 12:16, H. Nikolaus Schaller 
>> <hns@...delico.com> a écrit :
>>>  From: PrasannaKumar Muralidharan <prasannatsmkumar@...il.com>
>>>  This patch brings support for the JZ4780 efuse. Currently it only 
>>> exposes
>>>  a read only access to the entire 8K bits efuse memory and the
>>>  ethernet mac address for the davicom dm9000 chip on the CI20 board.
>>>  It also changes the nemc reg range to avoid overlap.
>>>  Tested-by: Mathieu Malaterre <malat@...ian.org>
>>>  Signed-off-by: PrasannaKumar Muralidharan 
>>> <prasannatsmkumar@...il.com>
>>>  Signed-off-by: Mathieu Malaterre <malat@...ian.org>
>>>  Signed-off-by: H. Nikolaus Schaller <hns@...delico.com>
>>>  ---
>>>  arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 ++++++++++++++++-
>>>  1 file changed, 16 insertions(+), 1 deletion(-)
>>>  diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi 
>>> b/arch/mips/boot/dts/ingenic/jz4780.dtsi
>>>  index f928329b034b..1e266be28096 100644
>>>  --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
>>>  +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
>>>  @@ -358,7 +358,7 @@
>>>  	nemc: nemc@...10000 {
>>>  		compatible = "ingenic,jz4780-nemc";
>>>  -		reg = <0x13410000 0x10000>;
>>>  +		reg = <0x13410000 0x4c>;
>> 
>>  This is wrong, the real size of the register area is 1x15c.
> 
> It should not overlap with the efuse reg range which is:
> 
> <0x134100d0 0x2c>
> 
> If I look at JZ4780 Mobile Application Processor Programming Manual
> section 16.4.1 Register Description Table 16-4 Static Memory 
> Interface Registers,
> I see
> 
> SMCR1 at 0x13410014 and
> SACR6 at 0x13410048 and all 32 bits wide. I.e. a total size of 0x4c.
> 
> Ah, now I see. There is also Table 16-5 NAND Flash Interface Registers
> starting with NFCSR at 0x13410050 and ending with TGHH register at 
> 0x13410154.
> 
> Hm. With this we are probably at "go back and start over"...
> 
> Either nemc must be separated into two drivers for Static Memory and 
> one
> for NAND Flash. Or must become able to handle two register ranges.
> 
> Or the e-fuse driver must become a part of the nemc driver.

Nothing that bad. I'll make the NEMC driver request only the area it 
needs, out of the 0x10000 register space.

Then, you can move the efuse node *inside* the nemc node (with proper 
#address-cells/#size-cells/ranges and "simple-mfd" compatible string) 
and everything will work.

> Well, another assumption is that there is no NAND driver. AFAIR it
> was even removed from the kernel because the maintainer did say
> it is not fixable (if I really remember correctly).

It's still there:
drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c

What was dropped from the kernel is MLC NAND support in UBI.

Cheers,
-Paul

>> 
>>>  		#address-cells = <2>;
>>>  		#size-cells = <1>;
>>>  		ranges = <1 0 0x1b000000 0x1000000
>>>  @@ -373,6 +373,21 @@
>>>  		status = "disabled";
>>>  	};
>>>  +	efuse: efuse@...100d0 {
>>>  +		compatible = "ingenic,jz4780-efuse";
>>>  +		reg = <0x134100d0 0x2c>;
>>>  +
>>>  +		clocks = <&cgu JZ4780_CLK_AHB2>;
>>>  +		clock-names = "ahb2";
>> 
>>  As explained in my response to the other patch, 'clock-names' can 
>> go away.
> 
> Yes.
> 
> BR,
> Nikolaus
> 


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ