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Message-Id: <20200227115526.28075-1-mans@mansr.com>
Date: Thu, 27 Feb 2020 11:55:26 +0000
From: Mans Rullgard <mans@...sr.com>
To: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2] ARM: dts: sunxi: h3/h5: add r_pwm node
There is a second PWM unit available in the PL I/O block.
Add a node and pinmux definition for it.
Signed-off-by: Mans Rullgard <mans@...sr.com>
---
Changed in v2:
- use singular name (pin vs pins) for pinmux group
- set pinmux in device node as there is only one choice
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 107eeafad20a..54b32537d6ae 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -871,6 +871,21 @@
pins = "PL0", "PL1";
function = "s_i2c";
};
+
+ r_pwm_pin: r-pwm-pin {
+ pins = "PL10";
+ function = "s_pwm";
+ };
+ };
+
+ r_pwm: pwm@...3800 {
+ compatible = "allwinner,sun8i-h3-pwm";
+ reg = <0x01f03800 0x8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_pwm_pin>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
};
};
};
--
2.25.0
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