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Message-Id: <20200301212019.2248-3-linux.amoon@gmail.com>
Date: Sun, 1 Mar 2020 21:20:17 +0000
From: Anand Moon <linux.amoon@...il.com>
To: linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Felipe Balbi <balbi@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCHv2 2/3] ARM: dts: exynos: Add missing usbdrd3 suspend clk
This patch adds new combatible strings for USBDRD3
for adding missing suspend clk, exynos5422 usbdrd3
support two clk USBD300 and SCLK_USBD300, so add missing
suspemd_clk for Exynos542x DWC3 nodes.
Signed-off-by: Anand Moon <linux.amoon@...il.com>
---
Previous changes:
Added missing suspend clk name Exynos5410 SoC.
---
arch/arm/boot/dts/exynos5410.dtsi | 8 ++++----
arch/arm/boot/dts/exynos5420.dtsi | 8 ++++----
arch/arm/boot/dts/exynos54xx.dtsi | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 2eab80bf5f3a..19845dcd528f 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -396,8 +396,8 @@ &trng {
};
&usbdrd3_0 {
- clocks = <&clock CLK_USBD300>;
- clock-names = "usbdrd30";
+ clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBD300>;
+ clock-names = "usbdrd30", "usbdrd30_susp_clk";
};
&usbdrd_phy0 {
@@ -407,8 +407,8 @@ &usbdrd_phy0 {
};
&usbdrd3_1 {
- clocks = <&clock CLK_USBD301>;
- clock-names = "usbdrd30";
+ clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBD301>;
+ clock-names = "usbdrd30", "usbdrd30_susp_clk";
};
&usbdrd_dwc3_1 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b672080e7469..bd505256a223 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1372,8 +1372,8 @@ &trng {
};
&usbdrd3_0 {
- clocks = <&clock CLK_USBD300>;
- clock-names = "usbdrd30";
+ clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBD300>;
+ clock-names = "usbdrd30", "usbdrd30_susp_clk";
};
&usbdrd_phy0 {
@@ -1383,8 +1383,8 @@ &usbdrd_phy0 {
};
&usbdrd3_1 {
- clocks = <&clock CLK_USBD301>;
- clock-names = "usbdrd30";
+ clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBD301>;
+ clock-names = "usbdrd30", "usbdrd30_susp_clk";
};
&usbdrd_dwc3_1 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 8aa5117e58ce..0aac6255de5d 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -143,7 +143,7 @@ hsi2c_7: i2c@...d0000 {
};
usbdrd3_0: usb3-0 {
- compatible = "samsung,exynos5250-dwusb3";
+ compatible = "samsung,exynos5420-dwusb3";
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -165,7 +165,7 @@ usbdrd_phy0: phy@...00000 {
};
usbdrd3_1: usb3-1 {
- compatible = "samsung,exynos5250-dwusb3";
+ compatible = "samsung,exynos5420-dwusb3";
#address-cells = <1>;
#size-cells = <1>;
ranges;
--
2.25.1
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