linux-kernel - Re: [PATCH] mmc: sdhci-pci-gli: Enable MSI interrupt for GL975x

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 2 Mar 2020 10:09:26 -0700
From:   Raul Rangel <rrangel@...omium.org>
To:     Ben Chuang <benchuanggli@...il.com>
Cc:     adrian.hunter@...el.com, ulf.hansson@...aro.org,
        linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        ben.chuang@...esyslogic.com.tw
Subject: Re: [PATCH] mmc: sdhci-pci-gli: Enable MSI interrupt for GL975x

On Wed, Feb 19, 2020 at 05:29:00PM +0800, Ben Chuang wrote:
> From: Ben Chuang <ben.chuang@...esyslogic.com.tw>
> 
> Enable MSI interrupt for GL9750/GL9755. Some platforms
> do not support PCI INTx and devices can not work without
> interrupt. Like messages below:
> 
> [    4.487132] sdhci-pci 0000:01:00.0: SDHCI controller found [17a0:9755] (rev 0)
> [    4.487198] ACPI BIOS Error (bug): Could not resolve symbol [\_SB.PCI0.PBR2._PRT.APS2], AE_NOT_FOUND (20190816/psargs-330)
> [    4.487397] ACPI Error: Aborting method \_SB.PCI0.PBR2._PRT due to previous error (AE_NOT_FOUND) (20190816/psparse-529)
> [    4.487707] pcieport 0000:00:01.3: can't derive routing for PCI INT A
> [    4.487709] sdhci-pci 0000:01:00.0: PCI INT A: no GSI
> 
> Signed-off-by: Ben Chuang <ben.chuang@...esyslogic.com.tw>
> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 5eea8d70a85d..ce15a05f23d4 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -262,10 +262,26 @@ static int gl9750_execute_tuning(struct sdhci_host *host, u32 opcode)
>  	return 0;
>  }
>  
> +static void gli_pcie_enable_msi(struct sdhci_pci_slot *slot)
> +{
> +	int ret;
> +
> +	ret = pci_alloc_irq_vectors(slot->chip->pdev, 1, 1,
> +				    PCI_IRQ_MSI | PCI_IRQ_MSIX);
> +	if (ret < 0) {
> +		pr_warn("%s: enable PCI MSI failed, error=%d\n",
> +		       mmc_hostname(slot->host->mmc), ret);
> +		return;
> +	}
> +
> +	slot->host->irq = pci_irq_vector(slot->chip->pdev, 0);
> +}
> +
>  static int gli_probe_slot_gl9750(struct sdhci_pci_slot *slot)
>  {
>  	struct sdhci_host *host = slot->host;
>  
> +	gli_pcie_enable_msi(slot);
>  	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
>  	sdhci_enable_v4_mode(host);
>  
> @@ -276,6 +292,7 @@ static int gli_probe_slot_gl9755(struct sdhci_pci_slot *slot)
>  {
>  	struct sdhci_host *host = slot->host;
>  
> +	gli_pcie_enable_msi(slot);
>  	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
>  	sdhci_enable_v4_mode(host);
>  
Tested-by: Raul E Rangel <rrangel@...omium.org>