Message-Id: <3d2de7c1-ee95-ed6c-0346-4a1d20a0b75e@linux.ibm.com>
Date:   Mon, 2 Mar 2020 18:51:07 +0100
From:   Frederic Barrat <fbarrat@...ux.ibm.com>
To:     "Alastair D'Silva" <alastair@....ibm.com>, alastair@...ilva.org
Cc:     "Aneesh Kumar K . V" <aneesh.kumar@...ux.ibm.com>,
        "Oliver O'Halloran" <oohall@...il.com>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Michael Ellerman <mpe@...erman.id.au>,
        Andrew Donnellan <ajd@...ux.ibm.com>,
        Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Vishal Verma <vishal.l.verma@...el.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Ira Weiny <ira.weiny@...el.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Rob Herring <robh@...nel.org>,
        Anton Blanchard <anton@...abs.org>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Mahesh Salgaonkar <mahesh@...ux.vnet.ibm.com>,
        Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>,
        Cédric Le Goater <clg@...d.org>,
        Anju T Sudhakar <anju@...ux.vnet.ibm.com>,
        Hari Bathini <hbathini@...ux.ibm.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Greg Kurz <groug@...d.org>,
        Nicholas Piggin <npiggin@...il.com>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Alexey Kardashevskiy <aik@...abs.ru>,
        linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
        linux-nvdimm@...ts.01.org, linux-mm@...ck.org
Subject: Re: [PATCH v3 13/27] powerpc/powernv/pmem: Read the capability
 registers & wait for device ready



Le 21/02/2020 à 04:27, Alastair D'Silva a écrit :
> From: Alastair D'Silva <alastair@...ilva.org>
> 
> This patch reads timeouts & firmware version from the controller, and
> uses those timeouts to wait for the controller to report that it is ready
> before handing the memory over to libnvdimm.
> 
> Signed-off-by: Alastair D'Silva <alastair@...ilva.org>
> ---
>   arch/powerpc/platforms/powernv/pmem/Makefile  |  2 +-
>   arch/powerpc/platforms/powernv/pmem/ocxl.c    | 92 +++++++++++++++++++
>   .../platforms/powernv/pmem/ocxl_internal.c    | 19 ++++
>   .../platforms/powernv/pmem/ocxl_internal.h    | 24 +++++
>   4 files changed, 136 insertions(+), 1 deletion(-)
>   create mode 100644 arch/powerpc/platforms/powernv/pmem/ocxl_internal.c
> 
> diff --git a/arch/powerpc/platforms/powernv/pmem/Makefile b/arch/powerpc/platforms/powernv/pmem/Makefile
> index 1c55c4193175..4ceda25907d4 100644
> --- a/arch/powerpc/platforms/powernv/pmem/Makefile
> +++ b/arch/powerpc/platforms/powernv/pmem/Makefile
> @@ -4,4 +4,4 @@ ccflags-$(CONFIG_PPC_WERROR)	+= -Werror
>   
>   obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o
>   
> -ocxlpmem-y := ocxl.o
> +ocxlpmem-y := ocxl.o ocxl_internal.o
> diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c
> index 3c4eeb5dcc0f..431212c9f0cc 100644
> --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c
> +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c
> @@ -8,6 +8,7 @@
>   
>   #include <linux/module.h>
>   #include <misc/ocxl.h>
> +#include <linux/delay.h>
>   #include <linux/ndctl.h>
>   #include <linux/mm_types.h>
>   #include <linux/memory_hotplug.h>
> @@ -215,6 +216,36 @@ static int register_lpc_mem(struct ocxlpmem *ocxlpmem)
>   	return 0;
>   }
>   
> +/**
> + * is_usable() - Is a controller usable?
> + * @ocxlpmem: the device metadata
> + * @verbose: True to log errors
> + * Return: true if the controller is usable
> + */
> +static bool is_usable(const struct ocxlpmem *ocxlpmem, bool verbose)
> +{
> +	u64 chi = 0;
> +	int rc = ocxlpmem_chi(ocxlpmem, &chi);
> +
> +	if (rc < 0)
> +		return false;
> +
> +	if (!(chi & GLOBAL_MMIO_CHI_CRDY)) {
> +		if (verbose)
> +			dev_err(&ocxlpmem->dev, "controller is not ready.\n");
> +		return false;
> +	}
> +
> +	if (!(chi & GLOBAL_MMIO_CHI_MA)) {
> +		if (verbose)
> +			dev_err(&ocxlpmem->dev,
> +				"controller does not have memory available.\n");
> +		return false;
> +	}
> +
> +	return true;
> +}
> +
>   /**
>    * allocate_minor() - Allocate a minor number to use for an OpenCAPI pmem device
>    * @ocxlpmem: the device metadata
> @@ -328,6 +359,48 @@ static void ocxlpmem_remove(struct pci_dev *pdev)
>   	}
>   }
>   
> +/**
> + * read_device_metadata() - Retrieve config information from the AFU and save it for future use
> + * @ocxlpmem: the device metadata
> + * Return: 0 on success, negative on failure
> + */
> +static int read_device_metadata(struct ocxlpmem *ocxlpmem)
> +{
> +	u64 val;
> +	int rc;
> +
> +	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP0,
> +				     OCXL_LITTLE_ENDIAN, &val);
> +	if (rc)
> +		return rc;
> +
> +	ocxlpmem->scm_revision = val & 0xFFFF;
> +	ocxlpmem->read_latency = (val >> 32) & 0xFF;
> +	ocxlpmem->readiness_timeout = (val >> 48) & 0x0F;
> +	ocxlpmem->memory_available_timeout = val >> 52;
> +
> +	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP1,
> +				     OCXL_LITTLE_ENDIAN, &val);
> +	if (rc)
> +		return rc;
> +
> +	ocxlpmem->max_controller_dump_size = val & 0xFFFFFFFF;
> +
> +	// Extract firmware version text
> +	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_FWVER,
> +				     OCXL_HOST_ENDIAN, (u64 *)ocxlpmem->fw_version);
> +	if (rc)
> +		return rc;
> +
> +	ocxlpmem->fw_version[8] = '\0';
> +
> +	dev_info(&ocxlpmem->dev,
> +		 "Firmware version '%s' SCM revision %d:%d\n", ocxlpmem->fw_version,
> +		 ocxlpmem->scm_revision >> 4, ocxlpmem->scm_revision & 0x0F);
> +
> +	return 0;
> +}
> +
>   /**
>    * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device
>    * This is important as it enables templates higher than 0 across all other functions,
> @@ -368,6 +441,7 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
>   {
>   	struct ocxlpmem *ocxlpmem;
>   	int rc;
> +	u16 elapsed, timeout;
>   
>   	if (PCI_FUNC(pdev->devfn) == 0)
>   		return probe_function0(pdev);
> @@ -422,6 +496,24 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
>   		goto err;
>   	}
>   
> +	if (read_device_metadata(ocxlpmem)) {
> +		dev_err(&pdev->dev, "Could not read metadata\n");



Need to set rc



> +		goto err;
> +	}
> +
> +	elapsed = 0;
> +	timeout = ocxlpmem->readiness_timeout + ocxlpmem->memory_available_timeout;
> +	while (!is_usable(ocxlpmem, false)) {
> +		if (elapsed++ > timeout) {
> +			dev_warn(&ocxlpmem->dev, "OpenCAPI Persistent Memory ready timeout.\n");
> +			(void)is_usable(ocxlpmem, true);


I guess that extra call to is_usable() is just to log the cause of the 
error. However, with some bad luck, the call could now succeed.


   Fred


> +			rc = -ENXIO;
> +			goto err;
> +		}
> +
> +		msleep(1000);
> +	}
> +
>   	rc = register_lpc_mem(ocxlpmem);
>   	if (rc) {
>   		dev_err(&pdev->dev, "Could not register OpenCAPI persistent memory with libnvdimm\n");
> diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c
> new file mode 100644
> index 000000000000..617ca943b1b8
> --- /dev/null
> +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c
> @@ -0,0 +1,19 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright 2019 IBM Corp.
> +
> +#include <misc/ocxl.h>
> +#include <linux/delay.h>
> +#include "ocxl_internal.h"
> +
> +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi)
> +{
> +	u64 val;
> +	int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI,
> +					 OCXL_LITTLE_ENDIAN, &val);
> +	if (rc)
> +		return rc;
> +
> +	*chi = val;
> +
> +	return 0;
> +}
> diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h
> index 9cf3e42750e7..ba0301533d00 100644
> --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h
> +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h
> @@ -97,4 +97,28 @@ struct ocxlpmem {
>   	void *metadata_addr;
>   	struct resource pmem_res;
>   	struct nd_region *nd_region;
> +	char fw_version[8+1];
> +
> +	u32 max_controller_dump_size;
> +	u16 scm_revision; // major/minor
> +	u8 readiness_timeout;  /* The worst case time (in seconds) that the host shall
> +				* wait for the controller to become operational following a reset (CHI.CRDY).
> +				*/
> +	u8 memory_available_timeout;   /* The worst case time (in seconds) that the host shall
> +					* wait for memory to become available following a reset (CHI.MA).
> +					*/
> +
> +	u16 read_latency; /* The nominal measure of latency (in nanoseconds)
> +			   * associated with an unassisted read of a memory block.
> +			   * This represents the capability of the raw media technology without assistance
> +			   */
>   };
> +
> +/**
> + * ocxlpmem_chi() - Get the value of the CHI register
> + * @ocxlpmem: the device metadata
> + * @chi: returns the CHI value
> + *
> + * Returns 0 on success, negative on error
> + */
> +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi);
> 

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