linux-kernel - Re: LPC Bus Driver

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Date:   Tue, 3 Mar 2020 23:45:22 +0800
From:   Xu Yilun <yilun.xu@...el.com>
To:     John Garry <john.garry@...wei.com>, luis.f.tanica@...gate.com
Cc:     linux-kernel@...r.kernel.org, linux-fpga@...r.kernel.org,
        gregkh@...uxfoundation.org, arnd@...db.de
Subject: Re: LPC Bus Driver

On Tue, Mar 03, 2020 at 10:13:36AM +0000, John Garry wrote:
> + add fpga list and Greg+Arnd for misc drivers
> 
> Hi Luis,
> 
> >
> >We have this board with our own SoC, which is connected to an external CPLD (FPGA) via LPC (low pin count) bus.
> >I've been doing some research to see what the best way of designing the drivers for it would be, and came across the Hisilicon LPC driver stuff (which I believe you're the maintainer for).
> >
> >Just a little background. Let's say our host (ARM) has a custom LPC controller. The LPC controller let's us perform reads/writes of CPLD registers via LPC bus. This CPLD is the only slave device attached to that bus and we only use it for reading/writing certain
> >  registers (e.g., we use it to access some system information and for resetting the ARM during reboot).
> >
> >I was looking at the regmap framework and that seemed a good way to go.
> 
> I thought that regmap only allows mapping in MMIO regions for multiplexing
> access from multiple drivers or accessing registers outside the device HW
> registers, but you seem to need to manually generate the LPC bus accesses to
> access registers on the slave device.

I'm not familar with LPC controller, but seems it could not perform
read/write by one memory access or io access instruction

I didn't find an existing bus_type for LPC bus, so I think regmap is a
good way. When you have implemented the regmap for LPC bus, you need to
access the CPLD registers by regmap_read/write, and just pass CPLD local
register addr as parameter.

> 
> If this FPGA is the only device which will ever be on this LPC bus, then
> could you encode the LPC accesses directly in the FPGA driver?
> 
> > But then I saw the logic_pio stuff as well and now I'm not sure what the
> best approach would be anymore
> 
> Logic PIO is for IO Port accesses. It could serve your purpose, but you
> would need to use IO port accesses for your slave driver, like inb and outb.

I quickly checked the logic PIO. When you implemented logic_pio for your lpc
and CPLD, you create an map from IO port addr to CPLD register addr. You
need to use inb/outb to access CPLD register (with some uncertain IO addrs?)

I'm not sure why it is needed to access non-pio devices using PIO, it
may be of some special purpose? 

Regmap may be a general choise.

> 
> As another alternative, it might be worth considering writing an I2C
> controller driver for your LPC host, i.e. model as an I2C bus, and have an
> I2C client driver for the LPC slave (FPGA). I think that there are examples
> of this in the kernel.

How the host cpu is connected to LPC host?
Why an I2C controller driver for LPC host? The LPC bus is compatible to i2c bus?

Thanks,
Yilun

> 
> All the best,
> john