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Date: Tue, 3 Mar 2020 14:14:01 +0100
From: Auger Eric <eric.auger@...hat.com>
To: zhangfei <zhangfei.gao@...aro.org>,
Tomasz Nowicki <tnowicki@...vell.com>,
"eric.auger.pro@...il.com" <eric.auger.pro@...il.com>,
"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
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"kvmarm@...ts.cs.columbia.edu" <kvmarm@...ts.cs.columbia.edu>,
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"alex.williamson@...hat.com" <alex.williamson@...hat.com>,
"jacob.jun.pan@...ux.intel.com" <jacob.jun.pan@...ux.intel.com>,
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Cc: "kevin.tian@...el.com" <kevin.tian@...el.com>,
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"marc.zyngier@....com" <marc.zyngier@....com>,
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wangzhou1 <wangzhou1@...ilicon.com>,
Kenneth Lee <kenneth-lee-2012@...mail.com>
Subject: Re: [PATCH v9 00/11] SMMUv3 Nested Stage Setup (VFIO part)
Hi Zhangfei,
On 3/3/20 1:57 PM, zhangfei wrote:
> Hi, Eric
>
> On 2019/11/20 下午6:18, Auger Eric wrote:
>>
>>>> This series brings the VFIO part of HW nested paging support
>>>> in the SMMUv3.
>>>>
>>>> The series depends on:
>>>> [PATCH v9 00/14] SMMUv3 Nested Stage Setup (IOMMU part)
>>>> (https://www.spinics.net/lists/kernel/msg3187714.html)
>>>>
>>>> 3 new IOCTLs are introduced that allow the userspace to
>>>> 1) pass the guest stage 1 configuration
>>>> 2) pass stage 1 MSI bindings
>>>> 3) invalidate stage 1 related caches
>>>>
>>>> They map onto the related new IOMMU API functions.
>>>>
>>>> We introduce the capability to register specific interrupt
>>>> indexes (see [1]). A new DMA_FAULT interrupt index allows to register
>>>> an eventfd to be signaled whenever a stage 1 related fault
>>>> is detected at physical level. Also a specific region allows
>>>> to expose the fault records to the user space.
>>>>
>>>> Best Regards
>>>>
>>>> Eric
>>>>
>>>> This series can be found at:
>>>> https://github.com/eauger/linux/tree/v5.3.0-rc0-2stage-v9
>>> I think you have already tested on ThunderX2, but as a formality, for
>>> the whole series:
>>>
>>> Tested-by: Tomasz Nowicki <tnowicki@...vell.com>
>>> qemu: https://github.com/eauger/qemu/tree/v4.1.0-rc0-2stage-rfcv5
>>> kernel: https://github.com/eauger/linux/tree/v5.3.0-rc0-2stage-v9 +
>>> Shameer's fix patch
>>>
>>> In my test I assigned Intel 82574L NIC and perform iperf tests.
>> Thank you for your testing efforts.
>>> Other folks from Marvell claimed this to be important feature so I asked
>>> them to review and speak up on mailing list.
>> That's nice to read that! So it is time for me to rebase both the iommu
>> and vfio parts. I will submit something quickly. Then I would encourage
>> the review efforts to focus first on the iommu part.
>>
>>
> vSVA feature is also very important to us, it will be great if vSVA can
> be supported in guest world.
>
> We just submitted uacce for accelerator, which will be supporting SVA on
> host, thanks to Jean's effort.
>
> https://lkml.org/lkml/2020/2/11/54
>
>
> However, supporting vSVA in guest is also a key component for accelerator.
>
> Looking forward this going to be happen.
>
>
> Any respin, I will be very happy to test.
OK. Based on your interest and Marvell's interest too, I will respin
both iommu & vfio series.
Thanks
Eric
>
>
> Thanks
>
>
>
>
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