linux-kernel - Re: [PATCH V2] mmc: sdhci-msm: Disable CQE during SDHC reset

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Message-ID: <1430237a-9dc5-f046-1dfe-1d5c09c16ead@codeaurora.org>
Date:   Wed, 4 Mar 2020 18:40:00 +0530
From:   Veerabhadrarao Badiganti <vbadigan@...eaurora.org>
To:     Adrian Hunter <adrian.hunter@...el.com>, ulf.hansson@...aro.org
Cc:     linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
Subject: Re: [PATCH V2] mmc: sdhci-msm: Disable CQE during SDHC reset

Hi Adrian

On 3/4/2020 5:58 PM, Adrian Hunter wrote:
> On 4/03/20 1:54 pm, Veerabhadrarao Badiganti wrote:
>> When SDHC gets reset (E.g. in suspend path), CQE also gets reset
>> and goes to disable state. But s/w state still points it as CQE
>> is in enabled state. Since s/w and h/w states goes out of sync,
>> it results in s/w request timeout for subsequent CQE requests.
>>
>> To synchronize CQE s/w and h/w state during SDHC reset,
>> explicitly disable CQE after reset.
> Shouldn't you be calling cqhci_suspend() / cqhci_resume() in the suspend and
> resume paths?

This issue is seen during mmc runtime suspend.  I can add it 
sdhci_msm_runtime_suspend

but sdhci_msm runtime delay is aggressive, its 50ms. It may get invoked 
very frequently.

So Im of the opinion that disabling CQE very often from platform runtime 
suspend is overkill.

>> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@...eaurora.org>
>> ---
>> Changes since V1:
>> 	- Disable CQE only when SDHC undergoes s/w reset for all.
>> ---
>>   drivers/mmc/host/sdhci-msm.c | 9 ++++++++-
>>   1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 53b79ee..75929d3 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -1823,6 +1823,13 @@ static void sdhci_msm_set_regulator_caps(struct sdhci_msm_host *msm_host)
>>   	pr_debug("%s: supported caps: 0x%08x\n", mmc_hostname(mmc), caps);
>>   }
>>   
>> +static void sdhci_msm_reset(struct sdhci_host *host, u8 mask)
>> +{
>> +	sdhci_reset(host, mask);
>> +	if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL))
>> +		cqhci_suspend(host->mmc);
>> +}
>> +
>>   static const struct sdhci_msm_variant_ops mci_var_ops = {
>>   	.msm_readl_relaxed = sdhci_msm_mci_variant_readl_relaxed,
>>   	.msm_writel_relaxed = sdhci_msm_mci_variant_writel_relaxed,
>> @@ -1861,7 +1868,7 @@ static void sdhci_msm_set_regulator_caps(struct sdhci_msm_host *msm_host)
>>   MODULE_DEVICE_TABLE(of, sdhci_msm_dt_match);
>>   
>>   static const struct sdhci_ops sdhci_msm_ops = {
>> -	.reset = sdhci_reset,
>> +	.reset = sdhci_msm_reset,
>>   	.set_clock = sdhci_msm_set_clock,
>>   	.get_min_clock = sdhci_msm_get_min_clock,
>>   	.get_max_clock = sdhci_msm_get_max_clock,
>>