linux-kernel - Re: [PATCH] dra7: sata: Fix SATA with CONFIG_ARM

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Date:   Thu, 5 Mar 2020 12:30:56 +0000
From:   Robin Murphy <robin.murphy@....com>
To:     Roger Quadros <rogerq@...com>, Tony Lindgren <tony@...mide.com>,
        Christoph Hellwig <hch@....de>
Cc:     yan-liu@...com, linux-omap@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        "Nori, Sekhar" <nsekhar@...com>
Subject: Re: [PATCH] dra7: sata: Fix SATA with CONFIG_ARM_LPAE enabled

On 05/03/2020 12:05 pm, Roger Quadros wrote:
> Tony, Christoph,
> 
> On 04/03/2020 18:20, Tony Lindgren wrote:
>> * Roger Quadros <rogerq@...com> [200304 09:01]:
>>> Even though the TRM says that SATA IP has 36 address bits
>>> wired in the SoC, we see bus errors whenever any address
>>> greater than 32-bit is given to the controller.
>>>
>>> This happens on dra7-EVM with 4G of RAM with CONFIG_ARM_LPAE=y.
>>>
>>> As a workaround we limit the DMA address range to 32-bits
>>> for SATA.
>>>
>>> Cc: Christoph Hellwig <hch@....de>
>>> Cc: Robin Murphy <robin.murphy@....com>
>>> Cc: Rob Herring <robh+dt@...nel.org>
>>> Reported-by: Yan Liu <yan-liu@...com>
>>> Signed-off-by: Roger Quadros <rogerq@...com>
>>> ---
>>>
>>> NOTE: Currently ARM dma-mapping code doesn't account for devices
>>> bus_dma_limit. This is fixed in [1].
>>>
>>> [1] https://lkml.org/lkml/2020/2/18/712
>>
>> So is this dts patch safe to apply without the series above?
>>
> 
> Yes. To my surprise this patch fixes the SATA issue even without [1].
> Without this patch dev->bus_dma_limit was being set to 0 and with the patch
> it is being set to 0xffffffff.

Right - LPAE configs should be getting dma-direct ops since 5.3, which 
already respect the limit. For non-LPAE configs it means you go from 
being broken from having no limit at all, to having a limit set but not 
respected, which is still equally broken, but no *more* so than before.

Robin.

>> And should this dts patch be applied as a fix or can it wait
>> until the merge window?
> 
> I think we should mark it for stable and apply it right away as fix for 
> v5.6.
> 
> Cc: stable@...nel.org
> 
> cheers,
> -roger
>>
>> Regards,
>>
>> Tony
>>
>>>   arch/arm/boot/dts/dra7.dtsi | 25 ++++++++++++++++---------
>>>   1 file changed, 16 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>> index d78b684e7fca..895462c22d1c 100644
>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>> @@ -642,15 +642,22 @@
>>>           };
>>>           /* OCP2SCP3 */
>>> -        sata: sata@...41100 {
>>> -            compatible = "snps,dwc-ahci";
>>> -            reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
>>> -            interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
>>> -            phys = <&sata_phy>;
>>> -            phy-names = "sata-phy";
>>> -            clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
>>> -            ti,hwmods = "sata";
>>> -            ports-implemented = <0x1>;
>>> +        sata_aux_bus {
>>> +            #address-cells = <1>;
>>> +            #size-cells = <2>;
>>> +            compatible = "simple-bus";
>>> +            ranges = <0x0 0x4a140000 0x0 0x1200>;
>>> +            dma-ranges = <0x0 0x0 0x1 0x00000000>;
>>> +            sata: sata@...41100 {
>>> +                compatible = "snps,dwc-ahci";
>>> +                reg = <0x0 0x0 0x1100>, <0x1100 0x0 0x7>;
>>> +                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
>>> +                phys = <&sata_phy>;
>>> +                phy-names = "sata-phy";
>>> +                clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
>>> +                ti,hwmods = "sata";
>>> +                ports-implemented = <0x1>;
>>> +            };
>>>           };
>>>           /* OCP2SCP1 */
>>> -- 
>>> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
>>> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
>>>
>