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Message-Id: <20200305135909.8180-5-horia.geanta@nxp.com>
Date: Thu, 5 Mar 2020 15:59:08 +0200
From: Horia Geantă <horia.geanta@....com>
To: Shawn Guo <shawnguo@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>
Cc: Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Silvano Di Ninno <silvano.dininno@....com>,
Aymen Sghaier <aymen.sghaier@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
linux-crypto@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 4/5] ARM: dts: imx: align name for crypto node and child nodes
crypto node should use the "crypto" generic naming,
and not a specific one ("sahara", "dcp", "caam").
Child nodes of the crypto node for caam crypto engine
should use the "jr" name (without an index),
as indicated in the DT binding.
Signed-off-by: Horia Geantă <horia.geanta@....com>
---
arch/arm/boot/dts/imx23.dtsi | 2 +-
arch/arm/boot/dts/imx27.dtsi | 2 +-
arch/arm/boot/dts/imx28.dtsi | 2 +-
arch/arm/boot/dts/imx6qdl.dtsi | 6 +++---
arch/arm/boot/dts/imx6sl.dtsi | 2 +-
arch/arm/boot/dts/imx6sll.dtsi | 2 +-
arch/arm/boot/dts/imx6sx.dtsi | 6 +++---
arch/arm/boot/dts/imx6ul.dtsi | 8 ++++----
arch/arm/boot/dts/imx7s.dtsi | 8 ++++----
arch/arm/boot/dts/imx7ulp.dtsi | 4 ++--
10 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 8257630f7a49..eb0aeda1682c 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -422,7 +422,7 @@
clocks = <&clks 16>;
};
- dcp@...28000 {
+ dcp: crypto@...28000 {
compatible = "fsl,imx23-dcp";
reg = <0x80028000 0x2000>;
interrupts = <53 54>;
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index f3464cf52e49..002cd223f22d 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -525,7 +525,7 @@
reg = <0x10024600 0x200>;
};
- sahara2: sahara@...25000 {
+ sahara2: crypto@...25000 {
compatible = "fsl,imx27-sahara";
reg = <0x10025000 0x1000>;
interrupts = <59>;
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index e14d8ef0158b..a1cbbeb39a4f 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -998,7 +998,7 @@
clocks = <&clks 26>;
};
- dcp: dcp@...28000 {
+ dcp: crypto@...28000 {
compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
reg = <0x80028000 0x2000>;
interrupts = <52 53 54>;
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 70fb8b56b1d7..f87085db3f5e 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -942,7 +942,7 @@
reg = <0x02100000 0x100000>;
ranges;
- crypto: caam@...0000 {
+ crypto: crypto@...0000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -954,13 +954,13 @@
<&clks IMX6QDL_CLK_EIM_SLOW>;
clock-names = "mem", "aclk", "ipg", "emi_slow";
- sec_jr0: jr0@...0 {
+ sec_jr0: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr1: jr1@...0 {
+ sec_jr1: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index c8ec46fe8302..94e428b7759d 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -777,7 +777,7 @@
power-domains = <&pd_disp>;
};
- dcp: dcp@...c000 {
+ dcp: crypto@...c000 {
compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
reg = <0x020fc000 0x4000>;
interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 797f850492fe..e8e0fb334cfb 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -652,7 +652,7 @@
status = "disabled";
};
- dcp: dcp@...c000 {
+ dcp: crypto@...c000 {
compatible = "fsl,imx28-dcp";
reg = <0x020fc000 0x4000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index e47d346a3543..5ecbac85c87a 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -837,7 +837,7 @@
reg = <0x02100000 0x100000>;
ranges;
- crypto: caam@...0000 {
+ crypto: crypto@...0000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -850,13 +850,13 @@
<&clks IMX6SX_CLK_EIM_SLOW>;
clock-names = "mem", "aclk", "ipg", "emi_slow";
- sec_jr0: jr0@...0 {
+ sec_jr0: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr1: jr1@...0 {
+ sec_jr1: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index e1807e9d385a..b4a8f6a858b9 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -778,7 +778,7 @@
reg = <0x02100000 0x100000>;
ranges;
- crypto: caam@...0000 {
+ crypto: crypto@...0000 {
compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -789,19 +789,19 @@
<&clks IMX6UL_CLK_CAAM_MEM>;
clock-names = "ipg", "aclk", "mem";
- sec_jr0: jr0@...0 {
+ sec_jr0: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr1: jr1@...0 {
+ sec_jr1: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr2: jr2@...0 {
+ sec_jr2: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x3000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 196bbd6f6fcc..dad529564fe1 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -932,7 +932,7 @@
};
};
- crypto: caam@...00000 {
+ crypto: crypto@...00000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
@@ -943,19 +943,19 @@
<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
clock-names = "ipg", "aclk";
- sec_jr0: jr0@...0 {
+ sec_jr0: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr1: jr1@...0 {
+ sec_jr1: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr2: jr1@...0 {
+ sec_jr2: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x3000 0x1000>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index ab91c98f2124..f7c4878534c8 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -132,13 +132,13 @@
<&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
clock-names = "aclk", "ipg";
- sec_jr0: jr0@...0 {
+ sec_jr0: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
};
- sec_jr1: jr1@...0 {
+ sec_jr1: jr@...0 {
compatible = "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
--
2.17.1
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