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Message-ID: <4e48d56f184ed56d15d2ae6706fdb29e4c849132.camel@toradex.com>
Date:   Fri, 6 Mar 2020 09:46:45 +0000
From:   Philippe Schenker <philippe.schenker@...adex.com>
To:     "o.rempel@...gutronix.de" <o.rempel@...gutronix.de>,
        "a.fatoum@...gutronix.de" <a.fatoum@...gutronix.de>,
        "andrew@...n.ch" <andrew@...n.ch>
CC:     "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "festevam@...il.com" <festevam@...il.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-imx@....com" <linux-imx@....com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "allison@...utok.net" <allison@...utok.net>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "kstewart@...uxfoundation.org" <kstewart@...uxfoundation.org>
Subject: Re: [PATCH] ARM: mach-imx6q: add ksz9131rn_phy_fixup

On Fri, 2020-03-06 at 08:42 +0100, Ahmad Fatoum wrote:
> Hello Andrew,
> 
> On 3/5/20 5:51 PM, Andrew Lunn wrote:
> > On Thu, Mar 05, 2020 at 03:38:05PM +0100, Oleksij Rempel wrote:
> > > Hi Philippe,
> > > 
> > > On Thu, Mar 05, 2020 at 02:49:28PM +0100, Philippe Schenker wrote:
> > > > The MAC of the i.MX6 SoC is compliant with RGMII v1.3. The
> > > > KSZ9131 PHY
> > > > is like KSZ9031 adhering to RGMII v2.0 specification. This means
> > > > the
> > > > MAC should provide a delay to the TXC line. Because the i.MX6
> > > > MAC does
> > > > not provide this delay this has to be done in the PHY.
> > > > 
> > > > This patch adds by default ~1.6ns delay to the TXC line. This
> > > > should
> > > > be good for all boards that have the RGMII signals routed with
> > > > the
> > > > same length.
> > > > 
> > > > The KSZ9131 has relatively high tolerances on skew registers
> > > > from
> > > > MMD 2.4 to MMD 2.8. Therefore the new DLL-based delay of 2ns is
> > > > used
> > > > and then as little as possibly subtracted from that so we get
> > > > more
> > > > accurate delay. This is actually needed because the i.MX6 SoC
> > > > has
> > > > an asynchron skew on TXC from -100ps to 900ps, to get all RGMII
> > > > values within spec.
> > > 
> > > This configuration has nothing to do in mach-imx/* It belongs to
> > > the
> > > board devicetree. Please see DT binding documentation for needed
> > > properties:
> > > Documentation/devicetree/bindings/net/micrel-ksz90x1.txt
> > 
> > It probably does not even need that. Just
> > 
> > phy-mode = <rgmii-txid>
> 
> Looks to me like this isn't supported by the Micrel PHY driver or am
> I missing something?
> 
> Cheers
> Ahmad
> 
Hi Andrew and Ahmad, thanks for your comments. I totally forgot about
those more specific phy-modes. But just because none of our driver
supports that. Either the i.MX6 fec-driver as well as the micrel.c PHY
driver supports this tags.

What do you guys suggest then how I should implement that skew stuff?

The problem is that i.MX6 has an asynchronic skew of -100 to 900ps only
enabling the PHY-delay on TXC and RXC is not in all cases within the
RGMII timing specs. That's why I implemented this 'weird' numbers.

Philippe

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